ADC09QJ1300-Q1, ADC09DJ1300-Q1, ADC09SJ1300-Q1
SBAS997A – FEBRUARY 2020 – REVISED JUNE 2021
ADC09xJ1300-Q1 Quad/Dual/Single Channel, 1.3-GSPS, 9-bit
Analog-to-Digital Converter (ADC) with JESD204C Interface
1 Features
2 Applications
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AEC-Q100 qualified for automotive applications:
– Temperature grade 1: –40°C to +125°C, TA
ADC Core:
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Light detection and ranging (LiDAR)
3 Description
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ADC09xJ1300-Q1 is a family of quad, dual and single
channel, 9-bit, 1.3 GSPS analog-to-digital converters
(ADC). Low power consumption, high sampling rate
and 9-bit resolution makes the ADC09xJ1300-Q1
ideally suited for light detection and ranging (LiDAR)
systems. ADC09xJ1300-Q1 is qualified for automotive
applications.
– Resolution: 9 Bit
– Maximum sampling rate: 1.3 GSPS
– Non-interleaved architecture
– Internal dither reduces high-order harmonics
Performance specifications (–1 dBFS):
– SNR (100 MHz): 53.5 dBFS
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– ENOB (100 MHz): 8.5 Bits
– SFDR (100 MHz): 64 dBc
Full-power input bandwidth (-3 dB) of 6 GHz provides
flat frequency response for frequency modulated
continuous wave (FMCW) LiDAR systems and
provides a narrow impulse response for pulse-based
systems. The full-power input bandwidth also enables
direct RF sampling of up to 4 GHz.
– Noise floor (–20 dBFS): –143 dBFS
Full-scale input voltage: 800 mVPP-DIFF
Full-power input bandwidth: 6 GHz
JESD204C Serial data interface:
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– Support for 2 to 8 (Quad/Dual channel) or 1 to 4
(Single channel) total SerDes lanes
– Maximum baud-rate: 17.16 Gbps
– 64B/66B and 8B/10B encoding modes
– Subclass-1 support for deterministic latency
– Compatible with JESD204B receivers
Optional internal sampling clock generation
– Internal PLL and VCO (7.2–8.2 GHz)
SYSREF Windowing eases synchronization
Four clock outputs simplify system clocking
– Reference clocks for FPGA or adjacent ADC
– Reference clock for SerDes transceivers
Timestamp input and output for pulsed systems
Power consumption (1 GSPS):
Device Information
PART NUMBER
PACKAGE(1)
BODY SIZE (NOM)
ADC09QJ1300-Q1
ADC09DJ1300-Q1
ADC09SJ1300-Q1
FCBGA (144) 10.0 mm × 10.0 mm
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(1) For all available packages, see the package option
addendum at the end of the data sheet.
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– Quad Channel: 450 mW / channel
– Dual channel: 625 mW / channel
– Single channel: 940 mW
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Power supplies: 1.1 V, 1.9 V
Quad Channel Block Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.