Datasheet > ADC-674A/883

ADC-674A/883

更新时间： 2024-01-06 18:55:40

品牌	Logo	应用领域
村田 - MURATA		/
页数	文件大小	规格书
7页	193K
描述
A/D Converter, 12-Bit, 1 Func, CDIP28,

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技术参数
数据手册

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ADC-674A/883 技术参数

生命周期：	Active	Reach Compliance Code：	unknown
风险等级：	5.73	Base Number Matches：	1

ADC-674A/883 数据手册

ADC-674

12-Bit, μP-Compatible A/D Converter

TIMING CONTROL

The variety of the ADC-674's control modes (as shown in the "CONTROL INPUTS TRUTH TABLE") allow for simple interface in most system applications.

The output signal STS indicates the status of the device; high during a conversion, and low at the completion of a conversion. During a conversion (STS output

high), the output buffers remain in the high impedance state and data cannot be read. A start convert during conversion will not reset the converter or reinitiate a

conversion. However, if A₀changes state after a conversion begins, an additional start convert pulse will latch the new state of A₀, causing a wrong cycle length for

that conversion.

Control Inputs Truth Table

A₀

OPERATION

R/C

12/8

None

0-1

Initiate 12-bit conversion

Initiate a-bit conversion

Initiate 12-bit conversion

Initiate a-bit conversion

Initiate 12-bit conversion

Initiate a-bit conversion

Enable 12-bit Output

1-0

Enables 8 MSB's only

Enables 4 LSB's plus 4 trailing zeroes

TIMING AND OPERATION

Stand-Alone Mode Timing

For stand-alone operation, all that is required is a single control line to R/C, CE and 12/8 are tied high, CS and A₀are tied low, and the output appears in words of

12 bits

The R/C signal may have any duty cycle within the limits shown in the diagrams below

The data may be read when R/C is high unless STS is also high indicating a conversion is in progress.

50 ns

MIN

R/C

200 ns

MAX

STS

25 ns

MIN

30 ns MIN

1000 ns MAX

t^HEC

tSSC

tSRC

DATA

VALID

DATA

VALID

DB11-DB0

tHSC

tHRC

R/C

A₀

Figure 1. Outputs Enabled After Conversion

tSAC

tHAC

STS

R/C

STS

tDSC

150 ns

MIN

200 ns

MAX

HIGH IMPEDANCE

DB11-DB0

Figure 3. Start Convert Timing

150 ns

MAX

25 ns

MIN

A read operation in most applications begins after the

conversion is complete and STS is low. For earliest access to

DATA

VALID

DB11-DB0

the data, however, the read should begin no later than (t

HIGH-Z

) before STS goes low. (See Technical Note 3.)

Figure 2. Outputs Enabled With R/C High

DATEL

•

11 Cabot Boulevard, Mansﬁeld, MA 02048-1151 USA

•

Tel: (508) 339-3000

•

www.datel.com

•

e-mail: help@datel.com

20 Jan 2012 MDA_ADC-674.A02_D3 Page 5 of 7

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