Data Sheet
ADAU1787
Revision Code Register ..............................................................67
ADC, DAC, Headphone Power Controls Register .................68
PLL, Microphone Bias, and PGA Power Controls Register ..69
Digital Microphone Power Controls Register.........................70
PGA Channel 3 Gain Control LSBs Register ..........................92
PGA Slew Rate and Gain Link Register...................................93
Microphone Bias Level and Current Register .........................93
Digital Microphone Clock Rate Control Register ..................94
Serial Port, PDM Output, and Digital Microphone CLK
Power Controls Register.............................................................71
Digital Microphone Channel 0 and Channel 1 Rate, Order,
Mapping, and Edge Control Register..........................................95
DSP Power Controls Register....................................................72
ASRC Power Controls Register.................................................72
Interpolator Power Controls Register ......................................73
Decimator Power Controls Register.........................................74
State Retention Controls Register.............................................75
Chip Power Control Register.....................................................76
Clock Control Register...............................................................77
PLL Input Divider Register........................................................78
PLL Feedback Integer Divider (LSBs Register).......................78
PLL Feedback Integer Divider (MSBs Register) .....................78
PLL Fractional Numerator Value (LSBs Register)..................78
PLL Fractional Numerator Value (MSBs Register) ................79
PLL Fractional Denominator (LSBs Register).........................79
PLL Fractional Denominator (MSBs Register).......................79
PLL Update Register ...................................................................79
ADC Sample Rate Control Register .........................................80
ADC IBIAS Controls Register.......................................................81
ADC HPF Control Register.......................................................81
ADC Mute and Compensation Control Register ...................82
Analog Input Precharge Time Register....................................83
ADC Channel Mutes Register...................................................84
ADC Channel 0 Volume Control Register ..............................85
ADC Channel 1 Volume Control Register ..............................86
ADC Channel 2 Volume Control Register ..............................87
ADC Channel 3 Volume Control Register ..............................88
Digital Microphone Channel 2 and Channel 3 Rate, Order,
Mapping, and Edge Control Register..........................................96
Digital Microphone Channel 4 and Channel 5 Rate, Order,
Mapping, and Edge Control Register..........................................97
Digital Microphone Channel 6 and Channel 7 Rate, Order,
Mapping, and Edge Control Register..........................................98
Digtial Microphone Volume Options Register .......................99
Digital Microphone Channel Mute Controls Register.........100
Digital Microphone Channel 0 Volume Control Register...101
Digital Microphone Channel 1 Volume Control Register...102
Digital Microphone Channel 2 Volume Control Register...103
Digital Microphone Channel 3 Volume Control Register...104
Digital Microphone Channel 4 Volume Control Register...105
Digital Microphone Channel 5 Volume Control Register...106
Digital Microphone Channel 6 Volume Control Register...107
Digital Microphone Channel 7 Volume Control Register...108
DAC Sample Rate, Filtering, and Power Controls Register......109
DAC Volume Link, High-Pass Filter (HPF), and Mute
Controls Register.......................................................................110
DAC Channel 0 Volume Register ...........................................111
DAC Channel 1 Volume Register ...........................................112
DAC Channel 0 Routing Register...........................................113
DAC Channel 1 Routing Register...........................................115
Headphone Control Register...................................................117
Fast to Slow Decimator Sample Rates Channel 0 and Channel 1
Register........................................................................................117
Fast to Slow Decimator Sample Rates Channel 2 and Channel 3
Register........................................................................................118
PGA Channel 0 Gain Control MSBs, Mute, Boost, Slew
Register.........................................................................................89
Fast to Slow Decimator Sample Rates Channel 4 and Channel 5
Register........................................................................................119
PGA Channel 0 Gain Control LSBs Register ..........................89
PGA Channel 1 Gain Control MSBs, Mute, Boost, Slew
Register.........................................................................................90
Fast to Slow Decimator Sample Rates Channel 6 and Channel 7
Register........................................................................................120
PGA Channel 1 Gain Control LSBs Register ..........................90
Fast to Slow Decimator Channel 0 Input Routing Register .....121
Fast to Slow Decimator Channel 1 Input Routing Register .....122
Fast to Slow Decimator Channel 2 Input Routing Register .....124
Fast to Slow Decimator Channel 3 Input Routing Register .....125
Fast to Slow Decimator Channel 4 Input Routing Register .....127
PGA Channel 2 Gain Control MSBs, Mute, Boost, Slew
Register.........................................................................................91
PGA Channel 2 Gain Control LSBs Register ..........................91
PGA Channel 3 Gain Control MSBs, Mute, Boost, Slew
Register.........................................................................................92
Rev. 0 | Page 3 of 280
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