ADAU1702JSTZ-RL

更新时间： 2024-01-11 15:06:01

品牌	Logo	应用领域
亚德诺 - ADI		消费电路商用集成电路
页数	文件大小	规格书
52页	1175K
描述
SigmaDSP 28-56-Bit Audio Processor with Two ADCs and Four DACs

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技术参数
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ADAU1702JSTZ-RL 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	PLASTIC, MS-026BBC, LQFP-48	针数：	48
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.9	其他特性：	OPERATES ON 3.3V ANALOG SUPPLY AND 1.8V DIGITAL SUPPLY
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	S-PQFP-G48
JESD-609代码：	e0	长度：	7 mm
功能数量：	1	端子数量：	48
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装等效代码：	QFP48,.35SQ,20	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	240
电源：	1.8,3.3 V	认证状态：	Not Qualified
座面最大高度：	1.6 mm	子类别：	Other Consumer ICs
表面贴装：	YES	温度等级：	COMMERCIAL
端子面层：	TIN LEAD	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7 mm

ADAU1702JSTZ-RL 数据手册

SigmaDSP^®28-/56-Bit Audio Processor

with Two ADCs and Four DACs

ADAU1702

FEATURES

GENERAL DESCRIPTION

28-/56-bit, 25 MIPS digital audio processor

Two ADCs: SNR of 100 dB, THD + N of −83 dB

Four DACs: SNR of 104 dB, THD + N of −90 dB

Complete standalone operation

Self-boot from serial EEPROM

Auxiliary ADC with 4-input mux for analog control

GPIOs for digital controls and outputs

Fully programmable with SigmaStudio™ graphical tool

28-bit × 28-bit multiplier with 56-bit accumulator for full

double-precision processing

The ADAU1702 is a complete single-chip audio system with a

28-/56-bit audio DSP, ADCs, DACs, and microcontroller-like

control interfaces. Signal processing includes equalization, cross-

over, bass enhancement, multiband dynamics processing, delay

compensation, speaker compensation, and stereo image widening

and can be used to compensate for real-world limitations of

speakers, amplifiers, and listening environments, providing a

dramatic improvements of perceived audio quality.

Its signal processing is comparable to that found in high

end studio equipment. Most processing is done in full 56-bit,

double-precision mode, resulting in very good low level signal

performance. The ADAU1702 is a fully programmable DSP. The

easy to use SigmaStudio software allows the user to graphically

configure a custom signal processing flow using blocks such as

biquad filters, dynamics processors, level controls, and GPIO

interface controls.

Clock oscillator for generating master clock from crystal

PLL for generating master clock from 64 × f_S, 256 × f_S,

384 × f_S, or 512 × f_Sclocks

Flexible serial data input/output ports with I²S-compatible,

left-justified, right-justified, and TDM modes

Sampling rates up to 192 kHz supported

On-chip voltage regulator for compatibility with 3.3 V systems

48-lead, plastic LQFP

APPLICATIONS

ADAU1702 programs can be loaded on power-up either from a

serial EEPROM through its own self-boot mechanism or from

an external microcontroller. On power-down, the current state

of the parameters can be written back to the EEPROM from the

ADAU1702 to be recalled the next time the program is run.

Multimedia speaker systems

MP3 player speaker docks

Automotive head units

Minicomponent stereos

Digital televisions

Studio monitors

Two Σ-Δ ADCs and four Σ-Δ DACs provide a 98.5 dB analog

input to analog output dynamic. Each ADC has a THD + N of

−83 dB, and each DAC has a THD + N of −90 dB. Digital input

and output ports allow a glueless connection to additional

ADCs and DACs. The ADAU1702 communicates through an

I²C® bus or a 4-wire SPI® port.

Speaker crossovers

Musical instrument effects processors

In-seat sound systems (aircraft/motor coaches)

FUNCTIONAL BLOCK DIAGRAM

PLL

DIGITAL DIGITAL ANALOG ANALOG PLL LOOP

VDD

GROUND VDD GROUND MODE FILTER

CRYSTAL

3.3V

CLOCK

OSCILLATOR

1.8V

REGULATOR

PLL

FILTD/CM

ADAU1702

2-CHANNEL

ANALOG

INPUT

DAC

STEREO

ADC

4-CHANNEL

ANALOG

OUTPUT

28-/56-BIT, 25MIPS

AUDIO PROCESSOR CORE

10ms DELAY MEMORY

FILTA/

ADC_RES

CONTROL

RESET/

MODE

SELECT

8-CH

DIGITAL

INPUT

8-BIT

AUX

ADC

8-CH

DIGITAL

OUTPUT

INTERFACE

AND

GPIO

SELFBOOT

INPUT/OUTPUT MATRIX

RESET SELF

BOOT

C/SPI

AND

DIGITAL IN AUX ADC DIGITAL OUT

WRITEBACK

GPIO

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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