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ADAU1463WBCPZ300RL PDF预览

ADAU1463WBCPZ300RL

更新时间: 2024-02-26 18:48:04
品牌 Logo 应用领域
亚德诺 - ADI DVD商用集成电路
页数 文件大小 规格书
207页 6267K
描述
SigmaDSP Digital Audio Processor

ADAU1463WBCPZ300RL 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN,
针数:88Reach Compliance Code:compliant
风险等级:2.16Samacsys Description:Audio DSPs 32bit SigmaDSP Audio 16K/48K
其他特性:DVDD SUPPLY OF 1.2V NOMINAL IS USED FOR DIGITAL CIRCUITRY商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-XQCC-N88长度:12 mm
功能数量:1端子数量:88
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度:0.9 mm最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
宽度:12 mm

ADAU1463WBCPZ300RL 数据手册

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ADAU1463/ADAU1467  
Data Sheet  
GENERAL DESCRIPTION  
The ADAU1463/ADAU1467 are automotive qualified audio  
processors that far exceed the digital signal processing  
capabilities of earlier SigmaDSP® devices. They are pin and  
register compatible with each other, as well as with the  
ADAU1450/ADAU1451/ADAU1452 SigmaDSP processors.  
The restructured hardware architecture is optimized for  
efficient audio processing. The audio processing algorithms  
support a seamless combination of stream processing (sample  
by sample), multirate processing, and block processing paradigms.  
The SigmaStudio® graphical programming tool enables the  
creation of signal processing flows that are interactive, intuitive,  
and powerful. The enhanced digital signal processor (DSP) core  
architecture enables some types of audio processing algorithms  
to be executed using significantly fewer instructions than were  
required on previous SigmaDSP generations, leading to vastly  
improved code efficiency.  
run serial ports at high speed, and enables systems with additional  
serial audio peripherals. These expanded serial audio ports, along  
with the clock generators, the on-board asynchronous sample rate  
converters (ASRCs), and a flexible hardware audio routing matrix  
make the ADAU1463/ ADAU1467 ideal audio hubs that greatly  
simplify the design of complex, multirate audio systems.  
The ADAU1463/ADAU1467 interface with a wide range of  
analog-to-digital converters (ADCs), digital-to-analog converters  
(DACs), digital audio devices, amplifiers, and control circuitry  
with highly configurable serial ports, I2C, serial peripheral  
interface (SPI), Sony/Philips Digital Interconnect Format  
(S/PDIF) interfaces, and multipurpose I/O pins. Dedicated  
decimation filters can decode the pulse density modulation  
(PDM) output of up to four MEMS microphones.  
Independent slave and master I2C/SPI control ports allow the  
ADAU1463/ADAU1467 to be programmed and controlled by  
an external master device such as a microcontroller, and to  
program and control slave peripherals directly. Self boot  
functionality and the master control port enable complex  
standalone systems.  
The 1.2 V, 32-bit DSP core can run at frequencies of up to  
294.912 MHz and execute up to 6144 single instruction, multiple  
data (SIMD) instructions per sample at the standard sample rate  
of 48 kHz. Powerful clock generator hardware, including a flexible  
phase-locked loop (PLL) with multiple fractional integer outputs,  
supports all industry standard audio sample rates. Nonstandard  
rates over a wide range can generate up to 15 sample rates simul-  
taneously. These clock generators, along with the on-board  
asynchronous sample rate converters (ASRCs) and a flexible  
hardware audio routing matrix, make the ADAU1463/ADAU1467  
ideal audio hubs that greatly simplify the design of complex  
multirate audio systems.  
Note that throughout this data sheet, multifunction pins, such  
as SDATAIO4/MP20, are referred to either by the entire pin  
name or by a single function of the pin, for example, MP20,  
when only that function is relevant.  
DIFFERENCES BETWEEN THE ADAU1463 AND  
ADAU1467  
The two variants of this device are differentiated by memory  
and DSP core frequency. A detailed summary of the differences  
is listed in Table 1.  
The ADAU1463/ADAU1467 have four input serial ports and  
four output serial ports. Each device has an asynchronous clock  
domain capable of operating as either a bit clock and frame sync  
master or slave. Each of the serial ports supports multiple data  
lines. The eight SDATAIOx pins each can be associated with any  
of the four input or four output serial ports. The use of assignable  
data pins allows a serial port to transmit or receive additional  
channels of audio data using a single bit clock and frame clock.  
Each of the supplemental data pins can carry from two to eight  
channels of serial audio. This flexible configuration provides  
more channels of audio input/output (I/O) without the need to  
Table 1. Product Selection Table  
Data  
Memory  
(kWords)  
Program  
Memory  
(kWords)  
DSP Core  
Frequency  
(MHz)  
Device  
ADAU1463WBCPZ300  
ADAU1463WBCPZ150  
ADAU1467WBCPZ300  
48  
48  
80  
16  
16  
24  
294.912  
147.456  
294.912  
Rev. A | Page 4 of 207  
 
 
 

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