SigmaDSP Digital Audio Processor
ADAU1462/ADAU1466
Data Sheet
Clock oscillator for generating master clock from crystal
Integer PLL and flexible clock generators
Integrated die temperature sensor
I2C and SPI control interfaces (both slave and master)
Standalone operation
FEATURES
Qualified for automotive applications
Fully programmable audio DSP for enhanced sound processing
Features SigmaStudio, a proprietary graphical programming
tool for the development of custom signal flows
Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V
Up to 24 kWords of program memory
Up to 80 kWords of parameter/data RAM
Up to 6144 SIMD instructions per sample at 48 kHz
Up to 1600 ms digital audio delay pool at 48 kHz
Audio I/O and routing
4 serial input ports, 4 serial output ports
48-channel, 32-bit digital I/O up to a sample rate of 192 kHz
Flexible configuration for TDM, I2S, left and right justified
formats, and PCM
Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and
139 dB dynamic range
Self-boot from serial EEPROM
6-channel, 10-bit SAR auxiliary control ADC
14 multipurpose pins for digital controls and outputs
On-chip regulator for generating 1.2 V from 3.3 V supply
72-lead, 10 mm × 10 mm LFCSP package with 5.3 mm
exposed pad
Temperature range: −40°C to +105°C
APPLICATIONS
Automotive audio processing
Head units
Distributed amplifiers
Rear seat entertainment systems
Trunk amplifiers
Commercial and professional audio processing
Stereo S/PDIF input and output at 192 kHz
Four PDM microphone input channels
Multichannel, byte addressable TDM serial ports
FUNCTIONAL BLOCK DIAGRAM
2
2
SPI/I C* SPI/I C*
PLLFILT
ADAU1462/
ADAU1466
VDRIVE
REGULATOR
2
2
GPIO/
AUX ADC
CLOCK
OSCILLATOR
I C/SPI
SLAVE
I C/SPI
MASTER
CLKOUT
PLL
THD_P
THD_M
TEMPERATURE
SENSOR
®
INPUT AUDIO
ROUTING MATRIX
OUTPUT AUDIO
ROUTING MATRIX
294.912MHz
PROGRAMMABLE AUDIO
PROCESSING CORE
S/PDIF
RECEIVER
S/PDIF
TRANSMITTER
SPDIFIN
SPDIFOUT
RAM, ROM, WATCHDOG,
MEMORY PARITY CHECK
SERIAL DATA
INPUT PORTS
(×4)
SDATA_IN3 TO SDATA_IN0
(48-CHANNEL
SDATA_OUT3 TO SDATA_OUT0
(48-CHANNEL
DIGITAL AUDIO
SERIAL DATA
OUTPUT PORTS
(×4)
8 × 2-CHANNEL
ASYNCHRONOUS
SAMPLE RATE
CONVERTERS
DIGITAL AUDIO
INPUTS)
OUTPUTS)
DIGITAL
MIC INPUT
INPUT
CLOCK
DOMAINS
(×4)
OUTPUT
CLOCK
DOMAINS
(×4)
BCLK_IN3 TO BCLK_IN0/
LRCLK_IN3 TO LRCLK_IN0
(INPUT CLOCK PAIRS)
BCLK_OUT3 TO BCLK_OUT0
LRCLK_OUT3 TO LRCLK_OUT0
(OUTPUT CLOCK PAIRS)
DEJITTER AND
CLOCK GENERATOR
2
*SPI/I C INCLUDES THE FOLLOWING PIN FUNCTIONS: SS_M, MOSI_M, SCL_M, SCLK_M, SDA_M, MISO_M, MISO, SDA,
SCLK, SCL, MOSI, ADDR1, SS, AND ADDR0 PINS.
Figure 1.
Rev. B
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