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ADAU1401

更新时间： 2024-01-02 07:25:46
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
52页 883K
描述
SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs

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ADAU1401 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFP
包装说明：LFQFP, QFP48,.35SQ,20针数：48
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.64商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：S-PQFP-G48JESD-609代码：e3
长度：7 mm功能数量：1
端子数量：48最高工作温度：105 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：LFQFP封装等效代码：QFP48,.35SQ,20
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260电源：1.8,3.3 V
认证状态：Not Qualified座面最大高度：1.6 mm
子类别：Other Consumer ICs表面贴装：YES
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7 mmBase Number Matches：1

ADAU1401 数据手册

 浏览型号ADAU1401的Datasheet PDF文件第7页浏览型号ADAU1401的Datasheet PDF文件第8页浏览型号ADAU1401的Datasheet PDF文件第9页浏览型号ADAU1401的Datasheet PDF文件第11页浏览型号ADAU1401的Datasheet PDF文件第12页浏览型号ADAU1401的Datasheet PDF文件第13页 
ADAU1401  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
48 47 46 45 44 43 42 41 40 39 38 37  
AGND  
ADC1  
1
2
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
AVDD  
PLL_LF  
PVDD  
PGND  
MCLKI  
OSCO  
RSVD  
MP2  
PIN 1  
INDICATOR  
ADC_RES  
ADC0  
3
4
ADAU1401  
RESET  
SELFBOOT  
ADDR0  
MP4  
5
TOP VIEW  
6
(Not to Scale)  
7
8
MP5  
9
MP3  
MP1  
10  
MP8  
MP0 11  
DGND  
MP9  
12  
DGND  
13 14 15 16 17 18 19 20 21 22 23 24  
Figure 7. 48-Lead LQFP Pin Configuration  
Table 11. Pin Function Descriptions  
Pin No.  
Mnemonic  
Type1  
Page No. Description  
1, 37, 42  
AGND  
PWR  
Analog Ground Pin. The AGND, DGND, and PGND pins can be tied directly  
together in a common ground plane. AGND should be decoupled to an  
AVDD pin with a 100 nF capacitor.  
2
ADC1  
A_IN  
19  
Analog Audio Input 1. Full-scale 100 ꢀArms input. Current input allows input  
voltage level to be scaled with an external resistor. An 18 kΩ resistor gives a  
2 Vrms full-scale input.  
3
4
ADC_RES  
ADC0  
A_IN  
A_IN  
19  
19  
ADC Reference Current. The full-scale current of the ADCs can be set with an  
external 18 kΩ resistor connected between this pin and ground.  
Analog Audio Input 0. Full-scale 100 ꢀArms input. Current input allows input  
voltage level to be scaled with an external resistor. An 18 kΩ resistor gives a  
2 Vrms full-scale input.  
5
6
RESET  
D_IN  
D_IN  
Active Low Reset Input. Reset is triggered on a high-to-low edge, and the  
ADAU1401 exits reset on a low-to-high edge. For more information about  
initialization, see the Power-Up Sequence section.  
Enable/Disable Self-Boot. SELFBOOT selects control port (low) or self-boot  
(high). Setting this pin high initiates a self-boot operation when the ADAU1401  
is brought out of a reset. This pin can be tied directly to the control voltage  
or pulled up/down with a resistor.  
I2C and SPI Address 0. In combination with ADDR1, this pin allows up to four  
ADAU1401s to be used on the same I2C bus and up to two ICs to be used  
with a common SPI CLATCH signal.  
SELFBOOT  
26  
22  
7
ADDR0  
D_IN  
8
9
MP4  
MP5  
MP1  
MP0  
DGND  
D_IO  
D_IO  
D_IO  
D_IO  
PWR  
44  
44  
44  
44  
Multipurpose GPIO or Serial Input Port LRCLK (INPUT_LRCLK).  
Multipurpose GPIO or Serial Input Port BCLK (INPUT_BCLK).  
Multipurpose GPIO or Serial Input Port Data 1 (SDATA_IN0).  
Multipurpose GPIO or Serial Input Port Data 0 (SDATA_IN1).  
Digital Ground Pin. The AGND, DGND, and PGND pins can be tied directly  
together in a common ground plane. DGND should be decoupled to a  
DVDD pin with a 100 nF capacitor.  
10  
11  
12, 25  
13, 24  
DVDD  
PWR  
1.8 V Digital Supply. This can be supplied either externally or generated  
from a 3.3 V supply with the on-board 1.8 V regulator. DVDD should be  
decoupled to DGND with a 100 nF capacitor.  
Rev. 0 | Page 10 of 52  
 
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