Datasheet > 射频和微波 > 射频/微波分光器/合路器> ADA4303-2

ADA4303-2

更新时间： 2024-02-23 12:32:34

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
12页	264K
描述
1:2 Single-Ended, Low Cost Active RF Splitter

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ADA4303-2 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	LCC12,.12SQ,20
针数：	12	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.1	特性阻抗：	75 Ω
构造：	COMPONENT	JESD-609代码：	e3
安装特点：	SURFACE MOUNT	端子数量：	12
最大工作频率：	1700 MHz	最小工作频率：
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装等效代码：	LCC12,.12SQ,20
电源：	5 V	射频/微波设备类型：	SPLITTER
子类别：	RF/Microwave Splitter/Combiners	最大压摆率：	90 mA
表面贴装：	YES	端子面层：	Matte Tin (Sn)
Base Number Matches：	1

ADA4303-2 数据手册

ADA4303-2

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter

The power dissipated in the package (P_D) is the sum of the

quiescent power dissipation and the power dissipated in the

package due to the load drive. The quiescent power is the

voltage between the supply pins (V_S) times the quiescent

current (I_S). The power dissipated due to the load drive depends

upon the particular application. The power due to load drive is

calculated by multiplying the load current by the associated

voltage drop across the device. RMS voltages and currents must

be used in these calculations.

Rating

Supply Voltage

Power Dissipation

Storage Temperature Range

Operating Temperature Range

Lead Temperature (Soldering, 10 sec)

Junction Temperature

5.5 V

See Figure 3

−65°C to +125°C

−40°C to +85°C

300°C

150°C

Stresses above those listed under Absolute Maximum

Rating may cause permanent damage to the device. This is

a stress rating only; functional operation of the device at

these or any other conditions above those indicated in the

operational section of this specification is not implied.

Exposure to absolute maximum rating conditions for

extended periods may affect device reliability.

Airflow increases heat dissipation, effectively reducing θ_JA. In

addition, more metal directly in contact with the package

leads/exposed pad from metal traces, through-holes, ground,

and power planes reduces the θ_JA.

Figure 3 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the 12-lead LFCSP_VQ

(99.2°C/W) on a JEDEC standard 4-layer board.

THERMAL RESISTANCE

2.5

2.0

1.5

1.0

0.5

θ_JAis specified for the worst-case conditions; that is, θ_JAis

specified for a device (including exposed pad) soldered to

the circuit board.

Table 3. Thermal Resistance

Package Type

θ_JA

Unit

12-Lead LFCSP_VQ (exposed pad)

99.2

°C/W

Maximum Power Dissipation

The maximum safe power dissipation in the ADA4303-2

package is limited by the associated rise in junction

temperature (T_J) on the die. At approximately 150°C, which

is the glass transition temperature, the plastic changes its

properties. Even temporarily exceeding this temperature

limit can change the stresses that the package exerts on the

die, permanently shifting the parametric performance of

the ADA4303-2. Exceeding a junction temperature of 150°C

for an extended period can result in changes in the silicon

devices, potentially causing failure.

–60

–40

–20

100

120

AMBIENT TEMPERATURE (°C)

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

ESD CAUTION

Rev. 0 | Page 4 of 12

1 2 345 6 7...12

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