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AD9912ABCPZ-REEL7

更新时间： 2024-01-30 14:35:36
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
40页 649K
描述
1 GSPS Direct Digital Synthesizer with 14-Bit DAC

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AD9912ABCPZ-REEL7 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN,针数：64
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：1.23
最大模拟输出电压：0.5 V最小模拟输出电压：-0.5 V
转换器类型：D/A CONVERTER输入位码：BINARY
输入格式：PARALLEL, WORDJESD-30 代码：S-XQCC-N64
JESD-609代码：e3长度：9 mm
湿度敏感等级：3位数：14
功能数量：1端子数量：64
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1 mm标称供电电压：1.8 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：9 mm
Base Number Matches：1

AD9912ABCPZ-REEL7 数据手册

 浏览型号AD9912ABCPZ-REEL7的Datasheet PDF文件第33页浏览型号AD9912ABCPZ-REEL7的Datasheet PDF文件第34页浏览型号AD9912ABCPZ-REEL7的Datasheet PDF文件第35页浏览型号AD9912ABCPZ-REEL7的Datasheet PDF文件第37页浏览型号AD9912ABCPZ-REEL7的Datasheet PDF文件第38页浏览型号AD9912ABCPZ-REEL7的Datasheet PDF文件第39页 
AD9912  
Register 0x01A9—FTW0 (Frequency Tuning Word) (Continued)  
Table 27.  
Bits  
Bit Name  
Description  
[31:24]  
FTW0  
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio  
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant  
byte of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to  
the FTW results in an instantaneous frequency jump but no phase discontinuity.  
Register 0x01AA—FTW0 (Frequency Tuning Word) (Continued)  
Table 28.  
Bits  
Bit Name  
Description  
[39:32]  
FTW0  
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio  
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant  
byte of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to  
the FTW results in an instantaneous frequency jump but no phase discontinuity.  
Register 0x01AB—FTW0 (Frequency Tuning Word) (Continued)  
Table 29.  
Bits  
Bit Name  
Description  
[47:40]  
FTW0  
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio  
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant  
byte of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to  
the FTW results in an instantaneous frequency jump but no phase discontinuity.  
Register 0x01AC—Phase  
Table 30.  
Bits  
Bit Name  
Description  
[7:0]  
DDS phase word  
Allows the user to vary the phase of the DDS output. See the Direct Digital Synthesizer section.  
Register 0x01AC is the least significant byte of the phase offset word (POW). Note that a momentary  
phase discontinuity may occur as the phase passes through 45° intervals.  
Register 0x01AD—Phase (Continued)  
Table 31.  
Bits  
Bit Name  
Description  
[13:8]  
DDS phase word  
Allows the user to vary the phase of the DDS output. See the Direct Digital Synthesizer section.  
Register 0x01AC is the least significant byte of the phase offset word (POW). Note that a momentary  
phase discontinuity may occur as the phase passes through 45° intervals.  
Rev. F | Page 36 of 40  
1...3334353637383940

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