Datasheet > AD9898KCPRL-20

AD9898KCPRL-20

更新时间： 2022-11-26 06:16:44

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
52页	518K
描述
CCD Signal Processor with Precision Timing⑩ Generator

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AD9898KCPRL-20 数据手册

AD9898

SPECIFICATIONS

Parameter

Min

Typ

Max

Unit

TEMPERATURE RANGE

Operating

Storage

–20

–65

+85

+150

°C

POWER SUPPLY VOLTAGE

AVDD (AFE Analog Supply)

TCVDD (Timing Core Analog Supply)

RGVDD (RG Driver)

HVDD (H1–H2 Drivers)

DRVDD (Data Output Drivers)

DVDD (Digital)

2.7

3.0

3.6

POWER DISSIPATION

20 MHz, Typical Supply Levels, 100 pF H1–H2 Loading

Power from HVDD Only*

150

Power-Down Mode (AFE and Digital in Standby Operation)

MAXIMUM CLOCK RATE (CLI)

AD9898

MHz

*The total power dissipated by the HVDD supply may be approximated using the equation

Total HVDD Power = (CLOAD × HVDD × Pixel Frequency) × HVDD × Number of H-Outputs Used

Actual HVDD power may be slightly higher than the calculated value because of stray capacitance inherent in the PCB layout/routing.

Specifications subject to change without notice.

(RGVDD = HVDD = 2.7 V to 3.6 V, DVDD = DRVDD = 2.7 V to 3.6 V, C_L= 20 pF, T_MINto T_MAX, unless

DIGITAL SPECIFICATIONS ^{otherwise noted.)}

Parameter

Symbol

Min

Typ

Max

Unit

LOGIC INPUTS

High Level Input Voltage

Low Level Input Voltage

High Level Input Current

Low Level Input Current

Input Capacitance

V_IH

V_IL

I_IH

I_IL

C_IN

2.1

µA

0.6

LOGIC OUTPUTS (Except H and RG)

High Level Output Voltage @ I_OH= 2 mA

Low Level Output Voltage @ I_OL= 2 mA

V_OH

V_OL

2.2

0.5

RG and H-DRIVER OUTPUTS (H1–H2)

High Level Output Voltage @ Maximum Current

Low Level Output Voltage @ Maximum Current

RG Maximum Output Current (Programmable)

H1 and H2 Maximum Output Current (Programmable)

Maximum Load Capacitance

V_OH

V_OL

VDD – 0.5

0.5

100

Specifications subject to change without notice.

REV. 0

–3–

1 234 5 6 7...52

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