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AD8564

更新时间： 2024-01-15 04:44:50
品牌 Logo 应用领域
亚德诺 - ADI 比较器
页数 文件大小 规格书
8页 117K
描述
Quad 7 ns Single Supply Comparator

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AD8564 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP16,.25针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.29
放大器类型：COMPARATOR最大平均偏置电流 (IIB)：9 µA
25C 时的最大偏置电流 (IIB)：0.4 µA最大输入失调电压：10000 µV
JESD-30 代码：R-PDSO-G16JESD-609代码：e3
长度：9.9 mm湿度敏感等级：1
负供电电压上限：-7 V标称负供电电压 (Vsup)：-5 V
功能数量：4端子数量：16
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：5,5/10,GND/-5 V认证状态：Not Qualified
标称响应时间：8 ns座面最大高度：1.75 mm
子类别：Comparator最大压摆率：15.6 mA
供电电压上限：7 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：3.9 mm
Base Number Matches：1

AD8564 数据手册

 浏览型号AD8564的Datasheet PDF文件第2页浏览型号AD8564的Datasheet PDF文件第3页浏览型号AD8564的Datasheet PDF文件第4页浏览型号AD8564的Datasheet PDF文件第6页浏览型号AD8564的Datasheet PDF文件第7页浏览型号AD8564的Datasheet PDF文件第8页 
AD8564  
3.000  
2.500  
0.000  
–1.000  
–2.000  
–3.000  
–4.000  
–5.000  
5.000  
4.000  
3.000  
2.000  
1.000  
0
V
= ؎5V  
+ANA  
V
= +5V  
+ANA  
2.000  
1.500  
1.000  
0.500  
0.000  
T
= +85؇C  
A
T
= +25؇C  
A
V
= +5V  
+ANA  
V
= ؎5V  
+ANA  
T
= –40؇C  
A
2
4
6
8
10  
12  
–75 –50 –25  
0
25 50 75 100 125 150  
–75 –50 –25  
0
25 50 75 100 125 150  
V
SUPPLY VOLTAGE – V  
TEMPERATURE – ؇C  
TEMPERATURE – ؇C  
+
DIG  
Figure 10. I+DIG: Digital Supply Cur-  
rent/Comparator vs. Supply Voltage  
Figure 11. I+ANA: Analog Supply Cur-  
rent/Comparator vs. Temperature  
Figure 12. I–ANA: Analog Supply Cur-  
rent/Comparator vs. Temperature  
2.000  
1.500  
1.000  
0.500  
0.000  
–75 –50 –25  
0
25 50 75 100 125 150  
TEMPERATURE – ؇C  
Figure 13. I+DIG: Digital Supply Current/  
Comparator vs. Temperature  
APPLICATIONS  
power supply pins to ground. These capacitors act as a charge  
reservoir for the device during high frequency switching.  
OPTIMIZING HIGH SPEED PERFORMANCE  
As with any high speed comparator or amplifier, proper design  
and layout techniques should be used to ensure optimal perfor-  
mance from the AD8564. The performance limits of high speed  
circuitry can easily be a result of stray capacitance, improper  
ground impedance or other layout issues.  
A ground plane is recommended for proper high speed perfor-  
mance. This can be created by using a continuous conductive  
plane over the surface of the circuit board, only allowing breaks  
in the plane for necessary current paths. The ground plane  
provides a low inductance ground, eliminating any potential  
differences at different ground points throughout the circuit  
board caused from “ground bounce.” A proper ground plane  
also minimizes the effects of stray capacitance on the circuit  
board.  
Minimizing resistance from source to the input is an important  
consideration in maximizing the high speed operation of the  
AD8564. Source resistance in combination with equivalent  
input capacitance could cause a lagged response at the input,  
thus delaying the output. The input capacitance of the AD8564  
in combination with stray capacitance from an input pin to  
ground could result in several picofarads of equivalent capaci-  
tance. A combination of 3 kΩ source resistance and 5 pF of  
input capacitance yields a time constant of 15 ns, which is  
slower than the 5 ns capability of the AD8564. Source imped-  
ances should be less than 1 kΩ for the best performance.  
OUTPUT LOADING CONSIDERATIONS  
The AD8564 output can deliver up to 40 mA of output current  
without any significant increase in propagation delay. The out-  
put of the device should not be connected to more than twenty  
(20) TTL input logic gates, or drive a load resistance less than  
100 Ω.  
It is also important to provide bypass capacitors for the power  
supply in a high speed application. A 1 µF electrolytic bypass  
capacitor should be placed within 0.5 inches of each power  
supply pin to ground. These capacitors will reduce any potential  
voltage ripples from the power supply. In addition, a 10 nF  
ceramic capacitor should be placed as close as possible from the  
To ensure the best performance from the AD8564 it is impor-  
tant to minimize capacitive loading of the output of the device.  
Capacitive loads greater than 50 pF will cause ringing on the  
output waveform and will reduce the operating bandwidth of  
the comparator. Propagation delay will also increase with  
capacitive loads above 100 pF.  
REV. A  
–5–  
12345678

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