AD8561ARUZ

更新时间： 2024-02-24 09:37:21

品牌	Logo	应用领域
亚德诺 - ADI		比较器放大器放大器电路光电二极管
页数	文件大小	规格书
12页	650K
描述
Ultrafast 7 ns Single Supply Comparator

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数据手册

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AD8561ARUZ 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP, SOP8,.45	针数：	8
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	1.15
放大器类型：	COMPARATOR	最大输入失调电压：	8000 µV
JESD-30 代码：	R-PDSO-G8	JESD-609代码：	e3
长度：	4.9 mm	湿度敏感等级：	1
负供电电压上限：	-7 V	标称负供电电压 (Vsup)：	-5 V
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP8,.45	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
电源：	3/5/+-5 V	认证状态：	Not Qualified
标称响应时间：	7 ns	座面最大高度：	1.75 mm
子类别：	Comparator	供电电压上限：	7 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	BIPOLAR	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	3.9 mm

AD8561ARUZ 数据手册

AD8561

INPUT STAGE AND BIAS CURRENTS

The AD8561 uses a PNP differential input stage that enables

the input common-mode range to extend all the way from the

negative supply rail to within 2.2 V of the positive supply rail.

The input common-mode voltage can be found as the average

of the voltage at the two inputs of the device. To ensure the

fastest response time, care should be taken not to allow the

input common-mode voltage to exceed either of these voltages.

The input signal is connected directly to the noninverting input

of the comparator. The output is fed back to the inverting input

through R1 and R2. The ratio of R1 to R1 + R2 establishes the

width of the hysteresis window with V_REFsetting the center of

the window, or the average switching voltage. The Q output will

switch high when the input voltage is greater than V_HIand will

not switch low again until the input voltage is less than V_LOas

given in Equation 1:

The input bias current for the AD8561 is 3 μA. As with any

PNP differential input stage, this bias current will go to zero on

an input that is high and will double on an input that is low.

Care should be taken in choosing resistor values to be con-

nected to the inputs as large resistors could cause significant

voltage drops due to the input bias current.

R1+ R2

V_HI= V –1–V

+V_REF

(

)

REF

(1)

⎛

⎞

⎟

V_LO=V_REF1–

⎜

R1+ R2

⎝

⎠

The input capacitance for the AD8561 is typically 3 pF. This is

measured by inserting a 5 kΩ source resistance to the input and

measuring the change in propagation delay.

Where V₊is the positive supply voltage.

The capacitor C_Fcan also be added to introduce a pole into the

feedback network. This has the effect of increasing the amount

of hysteresis at high frequencies. This can be useful when com-

paring a relatively slow signal in a high frequency noise environ-

USING HYSTERESIS

Hysteresis can easily be added to a comparator through the

addition of positive feedback. Adding hysteresis to a comparator

offers an advantage in noisy environments where it is not desir-

able for the output to toggle between states when the input

signal is near the switching threshold. Figure 17 shows a

method for configuring the AD8561 with hysteresis.

ment. At frequencies greater than f_P=

, the hysteresis

2π C_FR2

window approaches V_HI= V₊– 1 V and V_LO= 0 V. At frequen-

cies less than f_Pthe threshold voltages remain as in Equation 1.

COMPARATOR

SIGNAL

REF

Figure 17. Configuring the AD8561 with Hysteresis

Rev. A

–8–

1...5 6 789 10 11 12

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AD8561ARZ-REEL	ADI	Ultrafast 7 ns Single Supply Comparator	获取价格
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AD8563	ADI	1.8 V to 5 V Auto-Zero, In-Amp with Shutdown	获取价格
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