AD8390
SPECIFICATIONS
VS = 12 V or +24 V, RL = 100 Ω, G = 10, PWDN = (1,1), IADJ = NC, VOCM = float, TA = 25°C, unless otherwise noted.1, 2
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
Large Signal Bandwidth
Peaking
VOUT = 0.2 V p-p, RF = 10 kΩ
VOUT = 4 V p-p
VOUT = 0.2 V p-p
40
25
60
40
0.1
300
MHz
MHz
dB
Slew Rate
VOUT = 4 V p-p
V/µs
NOISE/DISTORTION PERFORMANCE
Second Harmonic Distortion
Third Harmonic Distortion
Multitone Power Ratio (26 kHz to 1.1 MHz)
–82
–91
–70
dBc
dBc
dBc
fC = 1 MHz, VOUT = 2 V p-p
fC = 1 MHz, VOUT = 2 V p-p
ZLINE = 100 Ω, PLINE = 19.8 dBm,
crest factor (CF) = 5.4
Multitone Power Ratio (26 kHz to 2.2 MHz)
ZLINE = 100 Ω, PLINE = 19.8 dBm,
crest factor (CF) = 5.4
–65
dBc
Voltage Noise (RTI)
Input Current Noise
f = 10 kHz
f = 10 kHz
8
1
nV/√Hz
pA/√Hz
INPUT CHARACTERISTICS
RTI Offset Voltage (VOS,DM(RTI)
RTI Offset Voltage (VOS,DM(RTI)
Input Bias Current
Input Offset Current
Input Resistance
)
)
V+IN – V–IN, VOCM = midsupply
V+IN – V–IN, VOCM = float
–3.0
–3.0
1.0
1.0
–4.0
0.05
400
2
+3.0
+3.0
–7.0
mV
mV
µA
µA
kΩ
pF
–0.35
+0.35
Input Capacitance
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Differential Output Voltage Swing
Output Balance Error
(∆VOS,DM(RTI))/(∆VIN,CM
)
58
64
dB
∆VOUT
(∆VOS,CM)/∆VOUT
RL = 10 Ω, fC = 100 kHz
43.8
44.2
60
400
44.6
V
dB
mA
Linear Output Current
Worst harmonic = –60 dBc
(V+OUT + V–OUT)/2, VOCM = midsupply
(V+OUT + V–OUT)/2, VOCM = float
Output Common-Mode Offset
Output Common-Mode Offset
POWER SUPPLY
–75
–75
35
35
+75
+75
mV
mV
Operating Range (Dual Supply)
Operating Range (Single Supply)
Total Quiescent Current
5
+10
12
+24
6.5
5.0
3.5
1.0
11.0
8.0
5.0
1.0
V
V
PWDN1, PWDN0 = (1,1); IADJ = VEE
(1,0); IADJ = VEE
(0,1); IADJ = VEE
(0,0); IADJ = VEE
PWDN1, PWDN0 = (1,1); IADJ = NC
(1,0); IADJ = NC
(0,1); IADJ = NC
(0,0); IADJ = NC
∆VOS,DM/∆VS, ∆VS = 1 V, VOCM = midsupply
5.2
3.8
2.5
0.57
10.0
6.7
3.8
0.67
76
mA
mA
mA
mA
mA
mA
mA
mA
dB
V
Total Quiescent Current
Power Supply Rejection Ratio (PSRR)
PWDN = 0 (Low Logic State)
PWDN = 1 (High Logic State)
VOCM TO VOUT SPECIFICATIONS
Input Voltage Range
70
1.0
1.6
V
–11.0 to +10.0
V
Input Resistance
VOCM Accuracy
28
1.0
kΩ
V/V
∆VOUT,CM/∆VOCM
0.996
1.004
1 VOCM bypassed with 0.1 µF capacitor.
2 See Figure 3.
Rev. C | Page 3 of 16