AD8343–SPECIFICATIONS
(VS = 5.0 V, TA = 25ꢂC)
BASIC OPERATING CONDITIONS
Parameter
Conditions
Figure
Min
Typ
Max
Unit
INPUT INTERFACE (INPP, INPM)
Differential Open Emitter
DC Bias Voltage
Internally Generated
Current Set by R3, R4
1% Bias Resistors; R3, R4
f = 50 MHz; R3 and R4 = 68.1 Ω
1.1
5
1.2
16
68.1
2.7 + j 6.8
1.3
20
V
Operating Current Each Input (IO)
Value of Bias Setting Resistor1
Port Differential Impedance
24
24
9
mA
Ω
Ω
OUTPUT INTERFACE (OUTP, OUTM)
Differential Open Collector
DC Bias Voltage
Externally Applied
4.5
5
5.5
V
Voltage Swing
Operating Current Each Output
Port Differential Impedance
1.65
VS
IO
900 – j 77
1
VS + 2
V
mA
Ω
Same as Input Current
f = 50 MHz
12
LO INTERFACE (LOIP, LOIM)
Differential Common Base Stage
DC Bias Voltage2
Internally Generated; Port
Typically AC-Coupled
50 Ω Impedance
300
–12
360
450
–3
mV
LO Input Power
Port Differential Return Loss
17
16
–10
–10
dBm
dB
POWER-DOWN INTERFACE (PWDN)
PWDN Threshold
Assured ON
Assured OFF
Time from Device ON to OFF
Time from Device OFF to ON
PWDN = 0 V (Device ON)
PWDN = 5 V (Device OFF)
VS – 1.5
–195
V
V
µs
ns
µA
µA
VS – 0.5
PWDN Response Time3
4
5
2.2
500
–85
0
PWDN Input Bias Current
POWER SUPPLY
Supply Voltage Range
Total Quiescent Current
4.5
5.0
50
5.5
60
75
95
15
V
R3 and R4 = 68.1 Ω
Over Temperature
VS = 5.5 V
VS = 4.5 V
Over Temperature, VS = 5.5 V
24
mA
mA
µA
µA
µA
Powered-Down Current
20
6
50
150
NOTES
1The balance in the bias current in the two legs of the mixer input may be important in applications were a low feedthrough of the LO is critical.
2This voltage is proportional to absolute temperature (PTAT). Reference section on DC-Coupling the LO for more information regarding this interface.
3Response time until device meets all specified conditions.
Specifications subject to change without notice.
–2–
REV. 0