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AD8170ARZ

更新时间： 2024-02-11 22:27:35
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER PC光电二极管
页数 文件大小 规格书
17页 1156K
描述
2-CHANNEL, VIDEO MULTIPLEXER, PDSO8, PLASTIC, SOIC-8

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AD8170ARZ 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：PLASTIC, SOIC-8针数：8
Reach Compliance Code：unknown风险等级：5.2
Is Samacsys：N模拟集成电路 - 其他类型：VIDEO MULTIPLEXER
JESD-30 代码：R-PDSO-G8JESD-609代码：e3
长度：4.9 mm湿度敏感等级：1
标称负供电电压 (Vsup)：-5 V信道数量：2
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260座面最大高度：1.75 mm
标称供电电压 (Vsup)：5 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：3.9 mmBase Number Matches：1

AD8170ARZ 数据手册

 浏览型号AD8170ARZ的Datasheet PDF文件第7页浏览型号AD8170ARZ的Datasheet PDF文件第8页浏览型号AD8170ARZ的Datasheet PDF文件第9页浏览型号AD8170ARZ的Datasheet PDF文件第11页浏览型号AD8170ARZ的Datasheet PDF文件第12页浏览型号AD8170ARZ的Datasheet PDF文件第13页 
AD8170/AD8174  
Equation 4 can be used to calculate expected gain error due to  
the current feedback amplifier’s finite transimpedance and  
common mode rejection. For low gains and recommended  
feedback resistors, this will be typically less than 0.4%. For  
most applications with gain greater than 1, the dominant source  
of gain error will most likely be the ratio-match of the external  
resistors. All of the dominant contributors to gain error are  
associated with the buffer amplifier and external resistors.  
These do not change as different channels are selected, so  
channel-to-channel gain match of less than 0.05% is easily  
attained.  
ACL = Closed Loop Gain  
CT = Transcapacitance Х 0.8 pF  
RF = Feedback Resistor  
G = Ideal Closed Loop Gain  
G
N = (1 + RF/RG) = Noise Gain  
RIN = Inverting Terminal Input Resistance 100 Ω  
The –3 dB bandwidth is determined from this model as:  
1
f –3dB  
2π CT R +G RIN  
(
)
F
N
This model is typically good to within 15%.  
Table III. Recommended Component Values  
RF  
RG  
RT  
G = 1+  
1−CMRR  
[
]
RF  
RG  
(4)  
RT + RIN 1+  
+ RF  
Small Signal  
OUT = 50 mV rms VOUT = 0.707 V rms  
Gain RF (⍀) RG (⍀) –3 dB BW (MHz) –3 dB BW (MHz)  
Large Signal  
V
↑
↑
Ideal Gain  
Error Terms  
AD8170R +1  
+2  
1 k  
—
710  
250  
50  
270  
290  
55  
RT = Amplifier Transresistance = 600 kΩ  
IN = Amplifier Input Resistance 100 Ω  
CMRR = Amplifier Common-Mode Rejection –52 dB  
499  
499  
54.9  
26.3  
R
+10 499  
+20 499  
27  
27  
AD8174R +1  
+2  
1 k  
—
780  
235  
50  
270  
280  
55  
Choice of External Resistors  
549  
549  
54.9  
26.3  
The gain and bandwidth of the multiplexer are determined by  
the closed-loop gain and bandwidth of the onboard current  
feedback amplifier. These both may be customized by the  
external resistor feedback network. Table III shows typical  
bandwidths at some common closed loop gains for given  
feedback and gain resistors (RF and RG, respectively).  
+10 499  
+20 499  
27  
27  
Capacitive Load  
The general rule for current feedback amplifiers is that the  
higher the load capacitance, the higher the feedback resistor  
required for stable operation. For the best combination of wide  
bandwidth and clean pulse response, a small output resistor is  
also recommended, as shown in Figure 24. Table IV contains  
values of feedback and series resistors that result in the best  
pulse response for a given load capacitance.  
The choice of RF is not critical unless the widest and flattest  
frequency response must be maintained. The resistors recom-  
mended in the table result in the widest 0.1 dB bandwidth with  
the least peaking. 1% resistors are recommended for applications  
requiring the best control of bandwidth. Packaging parasitics vary  
between DIP and SOIC packages, which may result in a slightly  
different resistor value for optimum frequency performance.  
Wider bandwidths than those listed in the table can be attained  
by reducing RF at the expense of increased peaking.  
R
F
10µF  
+V  
S
R
G
0.1µF  
R
To estimate the –3 dB bandwidth for feedback resistors not  
listed in Table III, the following single-pole model for the  
current feedback amplifier may be used:  
S(OUT)  
V
BUFFER  
OUT  
(TO FET PROBE)  
0.1µF  
C
V
L
IN  
R
50Ω  
T
SWITCH  
–V  
S
G
10µF  
ACL  
=
1+sCT R +G RIN  
(
)
F
N
Figure 24. Circuit for Driving a Capacitive Load  
Table IV. Recommended Feedback and Series Resistors and Bandwidth vs. Capacitive Load and Gain  
G = +1  
G = +2  
VOUT = 2 V p-p  
RSOUT –3 dB BW  
G = +3  
VOUT = 2 V p-p  
RSOUT –3 dB BW  
G ը +4  
V
OUT = 2 V p-p  
CL  
RF  
RSOUT  
–3 dB BW  
(MHz)  
RF  
(⍀)  
RF  
(⍀)  
RF  
RSOUT  
(pF) (⍀)  
(⍀)  
(⍀)  
(MHz)  
(⍀)  
(MHz)  
(⍀)  
(⍀)  
20  
50  
100  
300  
1 k  
1 k  
2k  
50  
30  
20  
20  
149  
104  
73  
1 k  
1 k  
1 k  
1 k  
20  
15  
15  
15  
174  
117  
80  
499  
1 k  
1 k  
1 k  
25  
15  
15  
15  
170  
98  
71  
499  
499  
499  
499  
20  
20  
15  
15  
2k  
27  
34  
33  
REV. 0  
–9–  
1...78910111213...17

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