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AD816AVR

更新时间: 2024-02-17 20:00:07
品牌 Logo 应用领域
亚德诺 - ADI 驱动器放大器
页数 文件大小 规格书
16页 414K
描述
500 mA Differential Driver and Dual Low Noise VF Amplifiers

AD816AVR 数据手册

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AD816  
Dual Composite Amplifier  
by R101 and all the downstream circuitry comprised of T1, the  
transmission line and its termination. For an ideal transformer,  
transmission line and termination, this will appear to be 15 ,  
and thus the signal appearing at Pins 1 and 2 of T1 will be the  
output of D1 divided by two in the ideal case. This signal is  
applied to the input of R1 (Receive 1 of the AD816) (Pin 3) via  
R105.  
A composite amplifier uses two different op amps together in a  
circuit to yield an overall performance that has some of the  
advantages of each op amp. In the case of the AD816, two com-  
posite amplifiers can be constructed that offer the low noise of  
the receiver amps in addition to the high current output of the  
driver amps.  
The circuit in Figure 51 shows an example of such a circuit. It  
uses receiver amp R1 for the low noise first stage and driver D1  
for the high output current second stage. Both local and overall  
feedback are used to get the desired response.  
In some ADSL systems (DMT), there is a need to transmit  
higher crest factor signals. Typically this is done by increasing  
the turns ratio of T1 to as much as 4:1. In this case, R101 and  
R201 would be 3.75 , and the peak current of the AD816  
(1 A) would be the drive limit of the transmitter.  
R1 is configured as a difference amplifier. The negative side  
(Pin 2) is driven by another signal that is a divided down version  
of the output of D1. This circuit is formed by R102 as one side  
of the voltage divider along with R103, C101, R104 and L101  
as the other half of the divider. If the frequency dependent  
impedance part of this circuit matches the transformer, trans-  
mission line and termination impedance, then the signals  
applied to both sides of the difference-amp-configured R1 will  
be the same, and the transmit signal will be totally subtracted  
out by the circuit.  
2
4
R1  
6
3
V
D1  
V
OUT  
IN  
5
Figure 51. AD816 Composite Amplifier  
Creating Differential Signals  
If only a single-ended signal is available to drive the AD816 and  
a differential output signal is desired, a circuit can be used to  
perform the single-ended to differential conversion.  
In a real-world situation, it is not practical (or even possible) to  
subtract out all of the transmit signal (100% trans-hybrid loss),  
but only provide a first order cancellation which goes a long way  
toward reducing the dynamic range of the RCVOUT signal.  
The overall performance of this circuit depends on the ability to  
build a lumped element network that matches the impedance of  
the transmission line over the frequency range required for  
ADSL (20 kHz to 1.1 MHz).  
The circuit shown in Figure 52 performs this function. It uses  
the AD816 with the gain of one receiver set at +1 and the gain  
of the other at –1. The 1 kresistor across the input terminals  
of the follower makes the noise gain (NG = 2) equal to the  
inverter’s. The two receiver outputs then differentially drive the  
inputs to the AD816 driver with no common-mode signal to first  
order.  
The circuits formed by D2 and R2 of the AD816 are totally  
symmetric with those formed by D1 and R1 and work in the  
same fashion. All the components in the D1, R1 circuits that are  
numbered with 100 range numbers are numbered with 200  
range numbers in the D2, R2 circuits.  
+15V  
+15V  
0.1F  
0.1F  
10F  
RECEIVER #1  
100⍀  
The receive signal from the telephone line creates a differential  
signal across the primary of T1. There is, however, a two to one  
reduction in amplitude due to turns ratio of T1. This differen-  
tial signal is applied to the + inputs (Pins 3 and 12) of R1 and  
R2. The receive amplifiers buffer this signal and present a differ-  
ential output at Pins 1 and 14. There is no significant receive  
signal applied to the negative inputs of R1 and R2 due to the  
attenuating effects of R101 and R201 and the low output  
impedances of D1 and D2.  
4
5
8
3
8
6
DRIVER #1  
AD816  
1
1k⍀  
AD816  
2
R
F
499⍀  
1k⍀  
R
G
R
L
100⍀  
1k⍀  
1k⍀  
R
F
499⍀  
6
5
10  
RECEIVER #2  
7
AD816  
DRIVER #2  
9
AD816  
4
11  
0.1F  
7
Thus, the overall circuit provides first order cancellation of the  
transmit signal and differential buffering of the receive signal.  
100⍀  
10F  
0.1F  
–15V  
–15V  
Figure 52. Differential Driver with Single-Ended  
Differential Converter  
REV. B  
–15–  

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