MIN to T , Loop Damping
AD800/AD802–SPECIFICATIONS (FVact=orV= 5,tounVless, Vothe=rwGiNsDe,nTot=edT)
EE
MIN
MAX CC
A
MAX
AD 800-45BQ
AD 800-52BR
AD 802-155KR/BR
P aram eter1
Condition
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
NOMINAL CENT ER FREQUENCY
OPERAT ING T EMPERAT URE K Grade
44.736
51.84
155.52
MHz
0
–40
70
85
°C
°C
RANGE (T MIN to T MAX
T RACKING RANGE
CAPT URE RANGE
)
B Grade
–40
43
85
–40
49
85
53
53
45.5
45.5
155
155
156
156
Mbps
Mbps
43
49
ST AT IC PHASE ERROR
ρ = 1, T A = +25°C,
VEE = –5.2 V
ρ = 1
2
3
10
11.5
2
3
10
11.5
14
18
30
37
Degrees
Degrees
RECOVERED CLOCK SKEW
SET UP T IME
tRCS (Figure 1)
tSU (Figure 1)
0.2
0.6
1
0.2
0.6
1
0.2
0.8
1
ns
2.06
2.37
ns
T RANSIT IONLESS DAT A RUN
OUT PUT JIT T ER
240
240
240
Bit Periods
ρ = 1
2
2.5
2.5
2
2.5
2.5
3.5
5.4
5.4
Degrees rms
Degrees rms
Degrees rms
27–1 PRN Sequence
223–1 PRN Sequence
4.7
4.7
4.7
4.7
9.7
9.7
JIT T ER T OLERANCE
f = 10 Hz
f = 2.3 kHz
f = 30 kHz
f = 1 MHz
f = 30 Hz
f = 300 Hz
f = 2 kHz
f = 20 kHz
f = 6.5 kHz
f = 65 kHz
2,500
2,500
3,000
Unit Intervals
Unit Intervals
Unit Intervals
Unit Intervals
Unit Intervals
Unit Intervals
Unit Intervals
Unit Intervals
Unit Intervals
Unit Intervals
6.5
0.47
0.47
830
83
7.4
0.47
2.0
0.26
7.6
0.9
JIT T ER T RANSFER
Damping Factor
Capacitor, CD
ζ = 1, Nominal
ζ = 5, Nominal
ζ = 10, Nominal
Peaking
8.2
0.22
0.82
6.8
0.15
0.68
2.2
0.047
0.22
nF
µF
µF
ζ = 1, Nominal
ζ = 5, Nominal
ζ = 10, Nominal
Bandwidth
T A = +25°C, VEE = –5.2 V
T A = +25°C, VEE = –5.2 V
T A = +25°C, VEE = –5.2 V
2
2
2
dB
dB
dB
kHz
0.08
0.02
45
0.08
0.02
52
0.08
0.02
130
ACQUISIT ION T IME
ρ = 1/2
T A = +25°C
ζ = 1
ζ = 5
ζ = 10
1 × 104
1 × 104
1.5 × 104
Bit Periods
3 × 105 8 × 105
8 × 105
3 × 105 8 × 105
8 × 105
4 × 105 8 × 105 Bit Periods
VEE = –5.2 V
1.4 × 106
Bit Periods
POWER SUPPLY
Voltage (VMIN to VMAX
Current
)
T A = +25°C
T A = +25°C, VEE = –5.2 V
–4.5
–5.2
125
–5.5
170
180
–4.5
–5.2
125
–5.5
170
180
–4.5
–5.2
140
–5.5
180
205
Volts
mA
mA
INPUT VOLT AGE LEVELS
Input Logic High, VIH
Input Logic Low, VIH
T A = +25°C
T A = +25°C
T A = +25°C
–1.084
–1.95
–0.72
–1.594 –1.95
–1.084
–0.72
–1.594 –1.95
–1.084
–0.72
–1.594 Volts
Volts
OUT PUT VOLT AGE LEVELS
Output Logic High, VOH
Output Logic Low, VOL
–1.084
–1.95
–0.72
–1.60
–1.084
–1.95
–0.72
–1.60
–1.084
–1.95
–0.72
–1.60
Volts
Volts
INPUT CURRENT LEVELS
Input Logic High, IIH
Input Logic Low, IIL
125
80
125
80
125
80
µA
µA
OUT PUT SLEW T IMES
Rise T ime (tR)
Fall T ime (tF)
T A = +25°C
20%–80%
80%–20%
0.75
0.75
1.5
1.5
0.75
0.75
1.5
1.5
0.75
0.75
1.5
1.5
ns
ns
SYMMET RY
ρ = 1/2, T A = +25°C
Recovered Clock Output
VEE = –5.2 V
45
55
45
55
45
55
%
NOT ES
1Refer to Glossary for parameter definition.
Specifications subject to change without notice.
–2–
REV. B
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