LC2MOS
(8+4) Loading Dual 12-Bit DAC
a
AD7937
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Two 12-Bit DACs in One Package
DAC Ladder Resistance Matching: 0.5%
Surface-Mount Package
V
DD
4-Quadrant Multiplication
Low Gain Error (3 LSB max Over Temperature)
Byte Loading Structure
AD7937
DAC A MS
DAC A LS
INPUT REG
INPUT REG
4
8
Fast Interface Timing
DAC A REGISTER
APPLICATIONS
UPD
12
Automatic Test Equipment
Programmable Filters
Audio Applications
Synchro Applications
Process Control
I
OUTA
DAC A
A1
A0
AGNDA
R
V
FBA
REFA
CONTROL
LOGIC
V
R
REFB
CS
FBB
I
OUTB
WR
DAC B
GENERAL DESCRIPTION
AGNDB
The AD7937 contains two 12-bit current output DACs on one
monolithic chip. A separate reference input is provided for each
DAC. The dual DAC saves valuable board space, and the mono-
lithic construction ensures excellent thermal tracking. Both DACs
are guaranteed 12-bit monotonic over the full temperature range.
12
CLR
DAC B REGISTER
4
8
DAC B LS
INPUT REG
DAC B MS
INPUT REG
The AD7937 has a 2-byte (eight LSBs, four MSBs) loading
structure. It is designed for right-justified data format. The control
signals for register loading are A0, A1, CS, WR, and UPD. Data
is loaded to the input registers when CS and WR are low. To
transfer this data to the DAC registers, UPD must be taken
low with WR.
DB7–DB0
DGND
PRODUCT HIGHLIGHTS
1. DAC-to-DAC Matching
Since both DACs are fabricated on the same chip, precise
matching and tracking is inherent. Many applications that are
not practical using two discrete DACs are now possible.
Typical matching: 0.5%.
Added features on the AD7937 include an asynchronous CLR
line which is very useful in calibration routines. When this is
taken low, all registers are cleared. The double buffering of the
data inputs allows simultaneous update of both DACs. Also,
each DAC has a separate AGND line. This increases the device
versatility; for instance, one DAC may be operated with AGND
biased while the other is connected in the standard configuration.
2. Small Package Size
The AD7937 is packaged in a small 24-lead SOIC.
3. Wide Power Supply Tolerance
The AD7937 is manufactured using the Linear Compatible
CMOS (LC2MOS) process. It is speed compatible with most
microprocessors and accepts TTL, 74HC, and 5 V CMOS logic
level inputs.
The device operates on a 5 V VDD, with 10% tolerance on
this nominal figure. All specifications are guaranteed over
this range.
REV. 0
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© Analog Devices, Inc., 2000