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AD7920BKS PDF预览

AD7920BKS

更新时间: 2024-11-26 22:07:07
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 521K
描述
250 kSPS, 10-/12-Bit ADCs in 6-Lead SC70

AD7920BKS 数据手册

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250 kSPS,  
10-/12-Bit ADCs in 6-Lead SC70  
AD7910/AD7920*  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Throughput Rate: 250 kSPS  
Specified for VDD of 2.35 V to 5.25 V  
Low Power:  
V
DD  
3.6 mW Typ at 250 kSPS with 3 V Supplies  
12.5 mW Typ at 250 kSPS with 5 V Supplies  
Wide Input Bandwidth:  
10-/12-BIT  
SUCCESSIVE-  
APPROXIMATION  
ADC  
V
T/H  
IN  
71 dB SNR at 100 kHz Input Frequency  
Flexible Power/Serial Clock Speed Management  
No Pipeline Delays  
High Speed Serial Interface  
SPI®/QSPI™/MICROWIRE™/DSP Compatible  
Standby Mode: 1 A Max  
SCLK  
SDATA  
CS  
CONTROL  
LOGIC  
6-Lead SC70 Package  
8-Lead MSOP Package  
AD7910/AD7920  
GND  
APPLICATIONS  
Battery-Powered Systems  
Personal Digital Assistants  
Medical Instruments  
Mobile Communications  
Instrumentation and Control Systems  
Data Acquisition Systems  
High Speed Modems  
The reference for the part is taken internally from VDD. This  
allows the widest dynamic input range to the ADC. Thus the  
analog input range for the part is 0 to VDD. The conversion rate  
is determined by the SCLK.  
Optical Sensors  
PRODUCT HIGHLIGHTS  
1. 10-/12-Bit ADCs in SC70 and MSOP Packages.  
2. Low Power Consumption.  
GENERAL DESCRIPTION  
The AD7910/AD7920 are, respectively, 10-bit and 12-bit, high  
speed, low power, successive-approximation ADCs. The parts  
operate from a single 2.35 V to 5.25 V power supply and feature  
throughput rates up to 250 kSPS. The parts contain a low noise,  
wide bandwidth track-and-hold amplifier that can handle input  
frequencies in excess of 13 MHz.  
3. Flexible Power/Serial Clock Speed Management.  
The conversion rate is determined by the serial clock, allowing  
the conversion time to be reduced through the serial clock  
speed increase. This allows the average power consumption to  
be reduced when power-down mode is used while not convert-  
ing. The part also features a power-down mode to maximize  
power efficiency at lower throughput rates. Current consumption  
is 1 A max and 50 nA typically when in power-down mode.  
The conversion process and data acquisition are controlled  
using CS and the serial clock, allowing the devices to interface  
with microprocessors or DSPs. The input signal is sampled on  
the falling edge of CS and the conversion is also initiated at this  
point. There are no pipeline delays associated with the part.  
4. Reference Derived from the Power Supply.  
5. No Pipeline Delay.  
The parts feature a standard successive-approximation ADC  
with accurate control of the sampling instant via a CS input  
and once-off conversion control.  
The AD7910/AD7920 use advanced design techniques to achieve  
very low power dissipation at high throughput rates.  
*Protected by U.S.Patent No. 6,681,332.  
REV. B  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  

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