AD7873
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
16
15
14
13
12
1
2
3
+V
DCLK
CS
CC
16 15 14 13
X+
Y+
X–
Y–
DIN
1
PIN 1
INDICATOR
12
AUX
Y+
X+
+V
AD7873
4
5
6
7
8
BUSY
DOUT
PENIRQ
2
3
4
11
10
9
V
REF
AD7873
TOP VIEW
(Not to Scale)
TOP VIEW
+V
CC
CC
(Not to Scale)
DCLK
PENIRQ
11
10
9
GND
V
+V
CC
5
6
7
8
BAT
AUX
V
REF
Figure 4.QSOP/TSSOP Pin Configuration
Figure 3. LFCSP Pin Configuration
Table 4. Pin Function Descriptions
Mnemonic Function
+VCC
Power Supply Input. The +VCC range for the AD7873 is from 2.2 V to 5.25 V. Both +VCC pins should be connected directly
together.
X+
Y+
X–
X+ Position Input. ADC Input Channel 1.
Y+ Position Input. ADC Input Channel 2.
X– Position Input.
Y–
Y– Position Input. ADC Input Channel 3.
GND
Analog Ground. Ground reference point for all circuitry on the AD7873. All analog input signals and any external reference
signals should be referred to this GND voltage.
VBAT
AUX
VREF
Battery Monitor Input. ADC Input Channel ꢀ.
Auxiliary Input. ADC Input Channel 5.
Reference Output for the AD7873. Alternatively an external reference can be applied to this input. The voltage range for the
external reference is 1.0 V to +VCC. For specified performance, it is 2.5 V on the AD7873. The internal 2.5 V reference is
available on this pin for use external to the device. The reference output must be buffered before it is applied elsewhere in a
system. A 0.1 µF capacitor is recommended between this pin and GND to reduce system noise effects.
PENIRQ
DOUT
Pen Interrupt. CMOS logic open drain output (requires 10 kΩ to 100 kΩ pull-up resistor externally).
Data Out. Logic Output. The conversion result from the AD7873 is provided on this output as a serial data stream. The bits are
clocked out on the falling edge of the DCLK input. This output is high impedance when CS is high.
BUSY
DIN
BUSY Output. Logic Output. This output is high impedance when CS is high.
Data In. Logic Input. Data to be written to the AD7873 control register is provided on this input and is clocked into the
register on the rising edge of DCLK (see the Control Register section).
CS
Chip Select Input. Active Low Logic Input. This input provides the dual function of initiating conversions on the AD7873 and
enabling the serial input/output register.
DCLK
External Clock Input. Logic Input. DCLK provides the serial clock for accessing data from the part. This clock input is also used
as the clock source for the AD7873 conversion process.
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