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AD7819YRZ-REEL PDF预览

AD7819YRZ-REEL

更新时间: 2024-02-13 11:12:31
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
11页 147K
描述
1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO16, 0.150 INCH, SOIC-16

AD7819YRZ-REEL 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.150 INCH, SOIC-16针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.19
Is Samacsys:N最大模拟输入电压:3 V
最小模拟输入电压:最长转换时间:4.5 µs
转换器类型:ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:9.9 mm
最大线性误差 (EL):0.1953%湿度敏感等级:1
模拟输入通道数量:1位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出位码:BINARY输出格式:PARALLEL, 8 BITS
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
采样速率:0.2 MHz采样并保持/跟踪并保持:TRACK
座面最大高度:1.75 mm子类别:Analog to Digital Converters
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.9 mm
Base Number Matches:1

AD7819YRZ-REEL 数据手册

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AD7819  
TIMING CHARACTERISTICS1, 2  
(–40C to +125C, unless otherwise noted)  
Parameter  
VDD = 3 V 10%  
VDD = 5 V 10%  
Units  
Conditions/Comments  
tPOWER-UP  
1
1
µs (max)  
µs (max)  
ns (min)  
ns (max)  
ns (min)  
ns (min)  
ns (max)  
ns (max)  
ns (min)  
Power-Up Time of AD7819 after Rising Edge of CONVST.  
Conversion Time.  
CONVST Pulsewidth.  
CONVST Falling Edge to BUSY Rising Edge Delay.  
CS to RD Setup Time.  
CS Hold Time after RD High.  
Data Access Time after RD Low.  
Bus Relinquish Time after RD High.  
Data Bus Relinquish to Falling Edge of CONVST Delay.  
t1  
t2  
t3  
t4  
t5  
4.5  
30  
30  
0
4.5  
30  
30  
0
0
0
3
t6  
t7  
10  
10  
100  
10  
10  
100  
3, 4  
3
t8  
NOTES  
1Sample tested to ensure compliance.  
2See Figures 12, 13 and 14.  
3These numbers are measured with the load circuit of Figure 1. They are defined as the time required for the o/p to cross 0.8 V or 2.4 V for V DD = 5 V 10% and  
0.4 V or 2 V for VDD = 3 V 10%.  
4Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back  
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t7, quoted in the Timing Characteristics is the true bus relinquish time  
of the part and as such is independent of external bus loading capacitances.  
Specifications subject to change without notice.  
ABSOLUTE MAXIMUM RATINGS*  
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V  
Digital Input Voltage to DGND  
I
200A  
OL  
(CONVST, RD, CS) . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V  
Digital Output Voltage to DGND  
TO  
OUTPUT  
PIN  
+1.6V  
C
L
(BUSY, DB0–DB7) . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V  
REFIN to AGND . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V  
Analog Input . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V  
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C  
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . .+150°C  
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW  
50pF  
200A  
I
OH  
Figure 1. Load Circuit for Digital Output Timing  
Specifications  
θ
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . +105°C/W  
Lead Temperature, (Soldering 10 sec) . . . . . . . . . . .+260°C  
ORDERING GUIDE  
Linearity  
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW  
θ
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75°C/W  
Lead Temperature, Soldering  
Error  
(LSB)  
Package  
Description  
Package  
Option  
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C  
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+220°C  
SSOP Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW  
Model  
AD7819YN  
AD7819YR  
AD7819YRU  
1 LSB  
1 LSB  
1 LSB  
Plastic DIP  
Small Outline IC  
Thin Shrink Small Outline RU-16  
(TSSOP)  
N-16  
R-16A  
θ
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 115°C/W  
Lead Temperature, Soldering  
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C  
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+220°C  
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 kV  
*Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; functional operation of the  
device at these or any other conditions above those listed in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability.  
–3–  
REV. A  

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