AD7819YRZ-REEL

更新时间： 2024-02-05 16:01:57

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
11页	147K
描述
1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO16, 0.150 INCH, SOIC-16

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

AD7819YRZ-REEL 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	0.150 INCH, SOIC-16	针数：	16
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.19
Is Samacsys：	N	最大模拟输入电压：	3 V
最小模拟输入电压：		最长转换时间：	4.5 µs
转换器类型：	ADC, SUCCESSIVE APPROXIMATION	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e3	长度：	9.9 mm
最大线性误差 (EL)：	0.1953%	湿度敏感等级：	1
模拟输入通道数量：	1	位数：	8
功能数量：	1	端子数量：	16
最高工作温度：	125 °C	最低工作温度：	-40 °C
输出位码：	BINARY	输出格式：	PARALLEL, 8 BITS
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP16,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
电源：	3/5 V	认证状态：	Not Qualified
采样速率：	0.2 MHz	采样并保持/跟踪并保持：	TRACK
座面最大高度：	1.75 mm	子类别：	Analog to Digital Converters
标称供电电压：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	AUTOMOTIVE
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	40	宽度：	3.9 mm
Base Number Matches：	1

AD7819YRZ-REEL 数据手册

AD7819

During the acquisition phase the sampling capacitor must be

charged to within a 1/2 LSB of its final value. The time it takes

to charge the sampling capacitor (T_CHARGE) is given by the fol-

lowing formula:

When operating in Mode 2, the ADC is powered down at the

end of each conversion and powered up again before the next

conversion is initiated. (See Figure 8.)

MODE 1

T_CHARGE= 6.2 × (R2 + 125 Ω) × 3.5 pF

For small values of source impedance, the settling time associ-

ated with the sampling circuit (100 ns) is, in effect, the acquisition

time of the ADC. For example, with a source impedance (R2)

of 10 Ω, the charge time for the sampling capacitor is approxi-

mately 3 ns. The charge time becomes significant for source

impedances of 2 kΩ and greater.

EXT CONVST

t_POWER-UP

1ꢀs

INT CONVST

AC Acquisition Time

MODE 2

In ac applications it is recommended to always buffer analog

input signals. The source impedance of the drive circuitry must

be kept as low as possible to minimize the acquisition time of the

ADC. Large values of source impedance will cause the THD to

degrade at high throughput rates.

EXT CONVST

INT CONVST

t_POWER-UP

1ꢀs

t_POWER-UP

1ꢀs

ADC TRANSFER FUNCTION

The output coding of the AD7819 is straight binary. The designed

code transitions occur at successive integer LSB values (i.e.,

1 LSB, 2 LSBs, etc.). The LSB size is = V_REF/256. The ideal

transfer characteristic for the AD7819 is shown in Figure 7 below.

Figure 8. Power-Up Times

POWER VS. THROUGHPUT RATE

By operating the AD7819 in Mode 2, the average power con-

sumption of the AD7819 decreases at lower throughput rates.

Figure 9 shows how the Automatic Power-Down is implemented

using the external CONVST signal to achieve the optimum

power performance for the AD7819. The AD7819 is operated

in Mode 2 and the duration of the external CONVST pulse is

set to be equal to or less than the power-up time of the device.

As the throughput rate is reduced, the device remains in its power-

down state longer and the average power consumption over time

drops accordingly.

111...111

111...110

•

111...000

•

1LSB = V

/256

REF

•

011...111

•

000...010

000...001

000...000

1LSB

–1LSB

REF

ANALOG INPUT

EXT CONVST

Figure 7. Transfer Characteristic

t_POWER-UP

t_CONVERT

5.0ꢀs

1ꢀs

POWER-UP TIMES

POWER-DOWN

The AD7819 has a 1 µs power-up time. When V_DDis first con-

nected, the AD7819 is in a low current mode of operation. In

order to carry out a conversion the AD7819 must first be pow-

ered up. The ADC is powered up by a rising edge on an internally

generated CONVST signal, which occurs as a result of a rising

edge on the external CONVST pin. The rising edge of the external

CONVST signal initiates a 1 µs pulse on the internal CONVST

signal. This pulse is present to ensure the part has enough time

to power-up before a conversion is initiated, as a conversion is

initiated on the falling edge of gated CONVST. See Timing and

Control section. Care must be taken to ensure that the CONVST

pin of the AD7819 is logic low when V_DDis first applied.

INT CONVST

t_CYCLE

100ꢀs @ 10kSPS

Figure 9. Automatic Power-Down

If, for example, the AD7819 is operated in a continuous sam-

pling mode with a throughput rate of 10 kSPS, the power

consumption is calculated as follows. The power dissipation

during normal operation is 10.5 mW, V_DD= 3 V. If the power-

up time is 1 µs and the conversion time is 4.5 µs, the AD7819

can be said to dissipate 10.5 mW for 5.5 µs (worst case) during

each conversion cycle. If the throughput rate is 10 kSPS, the

cycle time is then 100 µs and the average power dissipated dur-

ing each cycle is (5.5/100) × (10.5 mW) = 577.5 µW.

–7–

REV. A

1...4 5 678 9 10 11

下载PDF

与AD7819YRZ-REEL相关器件

型号	品牌	描述	获取价格	数据表
AD781AN	ADI	Complete 700 ns Sample-and-Hold Amplifier	获取价格
AD781ANZ	ADI	High Speed, Monolithic SHA with a Max Acquisition Time for 700 ns to 0.01% Over Temperatur	获取价格
AD781JN	ADI	Complete 700 ns Sample-and-Hold Amplifier	获取价格
AD781JNZ	ADI	Complete 700 ns Sample-and-hold amplifier	获取价格
AD781SQ	ADI	Complete 700 ns Sample-and-Hold Amplifier	获取价格
AD7820	ADI	LC2MOS HIGH-SPEED uP-COMPATIBLE 8-BIT ADC WITH TRACK/HOLD FUNCTION	获取价格

与AD7819YRZ-REEL相关文章

ADUM1201资料手册解读：参数分析、引脚说明、应用分析
2024-05-21

1
一文带你了解压敏电阻器在直流电路中的过压保护作用
2024-05-21

1
可控硅触发板选型指南
2024-05-21

1
蓝白可调电位器的原理与使用特点解析
2024-05-21

2

产品中心

服务支持

精选活动

关于我们

帮助中心

AD7819YRZ-REEL

AD7819YRZ-REEL 技术参数

AD7819YRZ-REEL 数据手册

与AD7819YRZ-REEL相关器件

与AD7819YRZ-REEL相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

AD7819YRZ-REEL

AD7819YRZ-REEL 技术参数

AD7819YRZ-REEL 数据手册

与AD7819YRZ-REEL相关器件

与AD7819YRZ-REEL相关文章

您还可以找

您在本页遇到什么问题？