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AD7415ART-2REEL PDF预览

AD7415ART-2REEL

更新时间: 2024-02-15 22:01:04
品牌 Logo 应用领域
亚德诺 - ADI 输出元件传感器换能器
页数 文件大小 规格书
11页 137K
描述
Switch/Digital Output Temperature Sensor, DIGITAL TEMP SENSOR-SERIAL, 10BIT(s), 2Cel, RECTANGULAR, SURFACE MOUNT, PLASTIC, SOT-23, 5 PIN

AD7415ART-2REEL 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:PLASTIC, SOT-23, 5 PINReach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.79Is Samacsys:N
最大精度(摄氏度):2 Cel主体宽度:1.65 mm
主体高度:1.17 mm主体长度或直径:2.9 mm
外壳:PLASTICJESD-609代码:e0
安装特点:SURFACE MOUNT位数:10
端子数量:5最大工作电流:1.2 mA
最高工作温度:125 °C最低工作温度:-55 °C
输出接口类型:I2C INTERFACE封装主体材料:PLASTIC/EPOXY
封装等效代码:TSOP5/6,.11,37封装形状/形式:RECTANGULAR
电源:3/5 V传感器/换能器类型:TEMPERATURE SENSOR,SWITCH/DIGITAL OUTPUT,SERIAL
子类别:Other Sensors最大供电电压:5.5 V
最小供电电压:2.7 V表面贴装:YES
温度系数:NEGATIVE/POSITIVE ppm/ °C端子面层:Tin/Lead (Sn/Pb)
端接类型:SOLDERBase Number Matches:1

AD7415ART-2REEL 数据手册

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Preliminary Technical Data  
AD7415  
C O NF IG U RAT IO N RE G IST E R (AD D RE SS 01H )  
T he Configuration Register is an 8-bit read/write register  
that is used to set the operating modes of the AD7415.  
Only four of the MSBs are used (D7 to D4) to set the  
operating modes, see T able 7. D0 to D5 are used for fac-  
tory settings and must have zeros written to them during  
normal operation.  
sions, up to eight AD7415s can be connected to a single,  
serial bus, or the addresses can be set to avoid conflicts  
with other devices on the bus.  
T he serial bus protocol operates as follows:  
1. T he master initiates data transfer by establishing a  
ST ART condition, defined as a high to low transition  
on the serial data line SDA whilst the serial clock line  
SCL remains high. T his indicates that an address/data  
stream will follow. All slave peripherals connected to  
the serial bus respond to the ST ART condition, and  
shift in the next 8 bits, consisting of a 7-bit address  
(MSB first) plus a R/W bit, which determines the direc-  
tion of the data transfer, i.e. whether data will be writ-  
ten to or read from the slave device.  
Table 6. Configur ation Register  
D7  
PD  
0 *  
D6  
D5  
D4  
D3  
D2 D1 D0  
FLTR  
1 *  
T EST MODE  
0s*  
*Default settings at Power-up.  
T he peripheral whose address corresponds to the trans-  
mitted address responds by pulling the data line low  
during the low period before the ninth clock pulse,  
known as the Acknowledge Bit. All other devices on the  
bus now remain idle whilst the selected device waits for  
data to be read from or written to it. If the R/W bit is a  
0 then the master will write to the slave device. If the  
R/W bit is a 1 the master will read from the slave de-  
vice.  
Table 7.  
Configur ation Register Settings  
D 7  
D 6  
Full Power-down if = 1  
Bypass SDA & SCL filtering if = 0  
2. Data is sent over the serial bus in sequences of 9 clock  
pulses, 8 bits of data followed by an Acknowledge Bit  
from the receiver of data. T ransitions on the data line  
must occur during the low period of the clock signal  
and remain stable during the high period, as a low to  
high transition when the clock is high may be inter-  
preted as a ST OP signal.  
T E M P E RAT U RE VALU E RE G IST E R  
T he T emperature Value Register is a 10-bit read-only  
register which stores the temperature reading from the  
ADC in twos complement format. T wo reads are neces-  
sary to read data from this register. T he full theoretical  
span of the ADC is 255oC, but in practice the temperature  
measurement range is limited to the operating range of the  
device, -55oC to +125oC for A-grade and -55oC to  
+135oC for S-grade.  
3. When all data bytes have been read or written, stop  
conditions are established. In WRIT E mode, the master  
will pull the data line high during the 10th clock pulse  
to assert a ST OP condition. In READ mode, the mas-  
ter device will pull the data line high during the low  
period before the 9th clock pulse. T his is known as No  
Acknowledge. T he master will then take the data line  
low during the low period before the 10th clock pulse,  
then high during the 10th clock pulse to assert a ST OP  
condition.  
Table 8.  
D14  
Tem per atur e Value Register (Fir st Read)  
D15  
D13  
D12  
D11  
D10  
D9  
D8  
M S B  
B8  
B7  
B6  
B5  
B4  
B3  
B2  
Table 9.  
Tem per atur e Value Register (Second Read)  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Any number of bytes of data may be transferred over the  
serial bus in one operation, but it is not possible to mix  
read and write in one operation, because the type of opera-  
tion is determined at the beginning and cannot subse-  
quently be changed without starting a new operation.  
B1  
L S B  
N /A  
N /A  
N /A  
N /A  
N /A  
N /A  
AD 7415 SE RIAL INT E RF AC E  
Control of the AD7415 is carried out via the I2C-compat-  
ible serial bus. T he AD7415 is connected to this bus as a  
slave device, under the control of a master device, e.g. the  
processor.  
WRITING TO TH E AD 7415  
T here are two different writes for the AD7415. One is for  
reading from either the Configuration Register or the  
T emperature Value Register. T he other is for writing to  
the Configuration Register only.  
SE RIAL BUS AD D RE SS  
Like all I2C-compatible devices, the AD7415 has a 7-bit  
serial address. T he four MSBs of this address for the  
AD7415 are set to 1001. T he AD7415 comes in four ver-  
sions, the AD7415-0, AD7415-1, AD7415-2 and the  
AD7415-3. T he first two versions have three different I2C  
addresses available which are selected by either tying the  
AS pin to GND, to VDD or letting the pin float (see  
T able 1). By giving different addresses for the four ver-  
Wr iting to the Addr ess P ointer Register for a subsequent  
r ea d .  
In order to read data from a particular register, the Ad-  
dress Pointer Register must contain the address of that  
register. If it does not, the correct address must be written  
to the Address Pointer Register by performing a single-  
REV. PrB  
7–  

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