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AD73311

更新时间： 2024-02-29 03:35:19
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
36页 333K
描述
Low Cost, Low Power CMOS General Purpose Analog Front End

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AD73311 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP20,.4针数：20
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.07
JESD-30 代码：R-PDSO-G20JESD-609代码：e3
长度：12.8 mm湿度敏感等级：1
功能数量：1端子数量：20
最高工作温度：105 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：3 V认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Modems
最大压摆率：0.0125 mA标称供电电压：3 V
表面贴装：YES技术：CMOS
电信集成电路类型：TELECOM CIRCUIT温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：7.5 mm
Base Number Matches：1

AD73311 数据手册

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AD73311  
AD73311A  
Typ  
Parameter  
Min  
Max  
Unit  
Test Conditions/Comments  
DAC SPECIFICATIONS (Continued)  
Power Supply Rejection  
–55  
25  
dB  
µs  
Input Signal Level at AVDD and DVDD  
Pins: 1.0 kHz, 100 mV p-p Sine Wave  
64 kHz Input Sample Rate, Interpolator  
Bypassed (CRE:5 = 1)  
Group Delay4, 5  
Output DC Offset2, 7  
Minimum Load Resistance, RL  
–30  
+20  
+70  
mV  
PGA = 6 dB  
2, 8  
Single-Ended  
Differential  
Maximum Load Capacitance, CL  
150  
150  
Ω
Ω
2, 8  
Single-Ended  
Differential  
500  
100  
pF  
pF  
FREQUENCY RESPONSE  
(ADC AND DAC)9 Typical Output  
0 Hz  
0
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
2000 Hz  
4000 Hz  
8000 Hz  
12000 Hz  
16000 Hz  
20000 Hz  
24000 Hz  
28000 Hz  
> 32000 Hz  
–0.1  
–0.25  
–0.6  
–1.4  
–2.8  
–4.5  
–7.0  
–9.5  
Channel Frequency Response Is  
Programmable by Means of External  
Digital Filtering  
< –12.5  
LOGIC INPUTS  
VINH, Input High Voltage  
VINL, Input Low Voltage  
IIH, Input Current  
VDD – 0.8  
0
VDD  
0.8  
10  
V
V
µA  
pF  
CIN, Input Capacitance  
10  
LOGIC OUTPUT  
VOH, Output High Voltage  
VOL, Output Low Voltage  
Three-State Leakage Current  
VDD – 0.4  
0
–10  
VDD  
0.4  
+10  
V
V
µA  
|IOUT| ≤ 100 µA  
|IOUT| ≤ 100 µA  
POWER SUPPLIES  
AVDD1, AVDD2  
DVDD  
2.7  
2.7  
3.3  
3.3  
V
V
10  
IDD  
See Table I  
NOTES  
1Operating temperature range is as follows: –40°C to +85°C. Therefore, TMIN = –40°C and TMAX = +85°C.  
2Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise noted).  
3At input to sigma-delta modulator of ADC.  
4Guaranteed by design.  
5Overall group delay will be affected by the sample rate and the external digital filtering.  
6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (4 × 1011)/DMCLK.  
7Between VOUTP and VOUTN.  
8At VOUT output.  
9Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier  
bypassed and input gain of 0 dB.  
10Test Conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs.  
Specifications subject to change without notice.  
Table I. Current Summary (AVDD = DVDD = +3.3 V)  
Analog Internal Digital External Interface Total Current  
MCLK  
SE ON  
Conditions  
Current Current  
Current  
(Max)  
Comments  
ADC On Only  
7
3
5
0
0.5  
0.5  
0
11.5  
17.5  
1.2  
1
1
0
YES  
YES  
NO  
REFOUT Disabled  
REFOUT Disabled  
REFOUT Disabled  
ADC and DAC On 10  
REFCAP On Only 0.75  
REFCAP and  
REFOUT On Only 3.0  
0
0.85  
0
0
4.5  
1.2  
0
0
NO  
YES  
All Sections Off  
All Sections Off  
0
MCLK Active Levels Equal to  
0 V and DVDD  
Digital Inputs Static and Equal  
to 0 V or DVDD  
0.00  
0.007  
0
0.04  
0
NO  
The above values are in mA and are typical values unless otherwise noted.  
REV. B  
–3–  
1234567...36

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