AD7265BSUZ

更新时间： 2024-01-07 07:44:39

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
28页	690K
描述
Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

AD7265BSUZ 数据手册

AD7265

TIMING SPECIFICATIONS

AV_DD= DV_DD= 2.7 V to 5.25 V, V_DRIVE= 2.7 V to 5.25 V, internal/external reference = 2.5 V, T_A= T_MAXto T_MIN, unless otherwise noted¹.

Table 2.

Parameter

Limit at T_MIN, T_MAX

Unit

Description

f_SCLK

14 × t_SCLK

875

MHz min

MHz max

ns max

ns min

ns max

ns min

ns max

ns min

ns max

T_A= −40ꢁC to +85ꢁC

T_A> 85ꢁC to 125ꢁC

t_CONVERT

t_SCLK= 1/f_SCLK

f_SCLK= 16 MHz

t_QUIET

t₂

Minimum time between end of serial read and next falling edge of

V_DD= 5 V/3 V, CS to SCLK setup time, T_A= −40ꢁC to +85ꢁC

V_DD= 5 V/3 V, CS to SCLK setup time, T_A> 85ꢁC to 125ꢁC

Delay from CS until D_OUTA and D_OUTB are three-state disabled

Data access time after SCLK falling edge, V_DD= 3 V

Data access time after SCLK falling edge, V_DD= 5 V

SCLK low pulse width

SCLK high pulse width

SCLK to data valid hold time, V_DD= 3 V

SCLK to data valid hold time, V_DD= 5 V

15/20

20/30

t₃

t₄

0.45 t_SCLK

t₅

t₆

t₇

t₈

CS rising edge to D_OUTA, D_OUTB, high impedance

CS rising edge to falling edge pulse width

SCLK falling edge to D_OUTA, D_OUTB, high impedance

t₉

t₁₀

¹Sample tested during initial release to ensure compliance. All input signals are specified with tr = tf = 5 ns (10ꢀ to 90ꢀ of V_DD) and timed from a voltage level of 1.6 V.

All timing specifications given are with a 25 pF load capacitance. With a load capacitance greater than this value, a digital buffer or latch must be used. See the Serial

Interface section and Figure 41 and Figure 42.

²Minimum SCLK for specified performance; with slower SCLK frequencies, performance specifications apply typically.

³The time required for the output to cross 0.4 V or 2.4 V.

Rev. A | Page 5 of 28

1 2 3 456 7 8...28

下载PDF

与AD7265BSUZ相关器件

型号	品牌	描述	获取价格	数据表
AD7265BSUZ-REEL	ADI	Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC	获取价格
AD7265BSUZ-REEL7	ADI	Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC	获取价格
AD7266	ADI	Differential Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC	获取价格
AD7266ACP	ADI	Differential Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC	获取价格
AD7266ASU	ADI	Differential Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC	获取价格
AD7266BCP	ADI	Differential Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC	获取价格