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AD688SQ PDF预览

AD688SQ

更新时间: 2024-01-21 07:04:57
品牌 Logo 应用领域
亚德诺 - ADI 电源电路参考电压源输出元件
页数 文件大小 规格书
8页 408K
描述
High Precision +-10 V Reference

AD688SQ 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:16
Reach Compliance Code:unknown风险等级:5.76
Is Samacsys:N其他特性:-10V OUTPUT ALSO AVAILABLE, -13.5V TO -18V SUPPLY IS ALSO REQUIRED
模拟集成电路 - 其他类型:THREE TERMINAL VOLTAGE REFERENCEJESD-30 代码:R-GDIP-T16
长度:19.05 mm功能数量:1
输出次数:2端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
最大输出电压:10.005 V最小输出电压:9.995 V
标称输出电压:10 V封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:COMMERCIAL
座面最大高度:5.08 mm最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):13.5 V标称供电电压 (Vsup):15 V
表面贴装:NO最大电压温度系数:6 ppm/ °C
温度等级:MILITARY端子面层:NOT SPECIFIED
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL微调/可调输出:NO
宽度:7.62 mmBase Number Matches:1

AD688SQ 数据手册

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AD688  
If further noise reduction is desired, an optional capacitor may  
be added between the NOISE REDUCTION pin and ground as  
shown in Figure 2b. This will form a low pass filter with the  
5 kRB on the output of the Zener cell. A 1 µF capacitor will  
have a 3 dB point at 32 Hz and will reduce the high frequency  
noise (to 1 MHz) to about 250 µV p-p. Figure 4 shows the 1 MHz  
noise of a typical AD688 both with and without a 1µF capacitor.  
When the NOISE REDUCTION feature is used, a 20 kΩ  
resistor between Pins 6 and 2 is required for proper startup.  
Figure 6. Turn-On With 1 µF CN  
TEMPERATURE PERFORMANCE  
The AD688 is designed for precision reference applications  
where temperature performance is critical. Extensive tempera-  
ture testing ensures that the device’s high level of performance is  
maintained over the operating temperature range.  
Figure 4. Effect of 1 µF Noise Reduction Capacitor on  
Broadband Noise  
Figure 7 shows the typical output voltage drift for the  
AD688SQ and illustrates the test methodology. The box in Fig-  
ure 7 is bounded on the sides by the operating temperature  
extremes and on top and bottom by the maximum and  
minimum +10 V output error voltages measured over the  
operating temperature range. The slopes of the diagonals drawn  
for both the +10 V and –10 V outputs determine the perform-  
ance grade of the device.  
TURN-ON TIME  
Upon application of power (cold start), the time required for the  
output voltage to reach its final value within a specified error is  
the turn-on settling time. Two components normally associated  
with this are: time for active circuits to settle and time for ther-  
mal gradients on the chip to stabilize. Figure 5 shows the turn-  
on characteristics of the AD688. It shows the settling time to be  
about 600 µs. Note the absence of any thermal tails when the  
horizontal scale is expanded to 2 ms/cm in Figure 5b.  
a. Electrical Turn-On  
Figure 7. Typical AD688SQ Temperature Drift  
Each AD688A and B grade unit is tested at –40°C, –25°C, 0°C,  
+25°C, +50°C, +70°C and +85°C. Each AD688S grade unit is  
tested at –55°C, –25°C, +25°C, +70°C and +125°C. This  
approach ensures that the variations of output voltage that occur  
as the temperature changes within the specified range will be  
contained within a box whose diagonal has a slope equal to the  
maximum specified drift. The position of the box on the vertical  
scale will change from device to device as initial error and the  
shape of the curve vary. Maximum height of the box for the  
appropriate temperature range is shown in Figure 8.  
b. Extended Time Scale  
Figure 5. Turn-On Characteristics  
Output turn-on time is modified when an external noise reduc-  
tion capacitor is used. When present, this capacitor presents an  
additional load to the internal Zener diode’s current source,  
resulting in a somewhat longer turn-on time. In the case of a  
1 µF capacitor, the initial turn-on time is approximately 100 ms  
(see Figure 6).  
Figure 8. Maximum +10 V or –10 V Output Change  
REV. A  
–5–  

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