AD6643BCPZRL7-200

更新时间： 2024-02-26 18:37:14

品牌	Logo	应用领域
亚德诺 - ADI		接收机
页数	文件大小	规格书
36页	1331K
描述
Dual IF Receiver 1.8 V supply voltages Internal ADC voltage reference

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AD6643BCPZRL7-200 数据手册

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AD6643

SPECIFICATIONS

ADC DC SPECIFICATIONS

AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.75 V p-p full-scale input range, default SPI,

unless otherwise noted.

Table 1.

Parameter

Temperature Min

Typ

Max

Unit

RESOLUTION

Full

Bits

ACCURACY

No Missing Codes

Offset Error

Gain Error

Differential Nonlinearity (DNL)¹

Integral Nonlinearity (INL)¹

MATCHING CHARACTERISTIC

Offset Error

Full

Guaranteed

% FSR

LSB

+2/−6

0.2ꢀ

0.1

0.2

LSB

2ꢀ°C

−2/+3.ꢀ

% FSR

Gain Error

TEMPERATURE DRIFT

Offset Error

Gain Error

Full

1ꢀ

ꢀ0

ppm/°C

INPUT REFERRED NOISE

VREF = 1.0 V

2ꢀ°C

0.614

LSB rms

ANALOG INPUT

Input Span

Full

1.7ꢀ

2.ꢀ

V p-p

kΩ

Input Capacitance²

Input Resistance³

Input Common-Mode Voltage

POWER SUPPLIES

Supply Voltage

AVDD

0.9

Full

1.7

1.8

1.9

DRVDD

Supply Current

I_AVDD

Full

238

1ꢀ4

260

21ꢀ

I_DRVDD

POWER CONSUMPTION

Sine Wave Input¹(DRVDD = 1.8 V)

Standby Power⁴

Full

706

8ꢀꢀ

Power-Down Power

¹Measured using a 10 MHz, 0 dBFS sine wave, and 100 Ω termination on each LVDS output pair.

²Input capacitance refers to the effective capacitance between one differential input pin and its complement.

³Input resistance refers to the effective resistance between one differential input pin and its complement.

⁴Standby power is measured using a dc input and the CLK pins inactive (set to AVDD or AGND).

Rev. 0 | Page 4 of 36

1 2 345 6 7...36

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