5秒后页面跳转
捷配首页

Datasheet > 转换器 > 数模转换器> AD660
AD660 PDF预览

AD660

更新时间： 2024-02-06 09:27:19
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
12页 428K
描述
Monolithic 16-Bit Serial/Byte DACPORT

阅读下载

获取价格

AD660 技术参数

Source Url Status Check Date：2013-05-01 14:56:15.802是否无铅： 含铅
是否Rohs认证： 不符合生命周期：Active
零件包装代码：DIP包装说明：DIP, DIP24,.3
针数：24Reach Compliance Code：not_compliant
ECCN代码：3A001.A.2.CHTS代码：8542.39.00.01
风险等级：5.16Is Samacsys：N
最大模拟输出电压：10 V最小模拟输出电压：-10 V
转换器类型：D/A CONVERTER输入位码：BINARY
输入格式：SERIAL, PARALLEL, 8 BITSJESD-30 代码：R-GDIP-T24
JESD-609代码：e0最大线性误差 (EL)：0.0061%
标称负供电电压：-15 V位数：16
功能数量：1端子数量：24
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP24,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT APPLICABLE
电源：5,+-15 V认证状态：Not Qualified
座面最大高度：5.08 mm最大稳定时间：13 µs
标称安定时间 (tstl)：2.5 µs子类别：Other Converters
最大压摆率：18 mA标称供电电压：15 V
表面贴装：NO技术：BICMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn63Pb37)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT APPLICABLE
宽度：7.62 mmBase Number Matches：1

AD660 数据手册

 浏览型号AD660的Datasheet PDF文件第3页浏览型号AD660的Datasheet PDF文件第4页浏览型号AD660的Datasheet PDF文件第5页浏览型号AD660的Datasheet PDF文件第7页浏览型号AD660的Datasheet PDF文件第8页浏览型号AD660的Datasheet PDF文件第9页 
AD660  
(Pin 21), and between REF OUT (Pin 24) and REF IN (Pin  
23). It is possible to use the AD660 without any external compo-  
nents by tying Pin 24 directly to Pin 23 and Pin 22 directly to  
Pin 21. Eliminating these resistors will increase the gain error by  
0.25% of FSR.  
SIGNAL-TO-NOISE RATIO: The signal-to-noise ratio is de-  
fined as the ratio of the amplitude of the output when a full-  
scale signal is present to the output with no signal present. This  
is measured in dB.  
DIGITAL-TO-ANALOG GLITCH IMPULSE: This is the  
amount of charge injected from the digital inputs to the analog  
output when the inputs change state. This is measured at half  
scale when the DAC switches around the MSB and as many  
as possible switches change state, i.e., from 011 . . . 111 to  
100 . . . 000.  
UNI/BIP CLR/  
SIN/ MSB/LSB/  
LBE  
CS  
DB0 DB1  
DB7  
15  
14  
12 11  
5
AD660  
10k  
HBE 16  
SER 17  
CLR 18  
SOUT  
13  
22  
16-BIT LATCH  
CONTROL  
LOGIC  
SPAN/  
BIP OFF  
DIGITAL FEEDTHROUGH: When the DAC is not selected  
(i.e., CS is held high), high frequency logic activity on the digi-  
tal inputs is capacitively coupled through the device to show up  
as noise on the VOUT pin. This noise is digital feedthrough.  
16-BIT LATCH  
16-BIT DAC  
R2  
50Ω  
LDAC  
19  
23  
10.05k  
10k  
VOUT  
21  
20  
REF IN  
OUTPUT  
AGND  
+10V REF  
THEORY OF OPERATION  
The AD660 uses an array of bipolar current sources with MOS  
current steering switches to develop a current proportional to  
the applied digital word, ranging from 0 to 2 mA. A segmented  
architecture is used, where the most significant four data bits are  
thermometer decoded to drive 15 equal current sources. The  
lesser bits are scaled using a R-2R ladder, then applied together  
with the segmented sources to the summing node of the output  
amplifier. The internal span/bipolar offset resistor can be con-  
nected to the DAC output to provide a 0 V to +10 V span, or it  
can be connected to the reference input to provide a –10 V to  
+10 V span.  
24  
REF OUT  
1
2
3
4
Ω
R1 50  
–VEE +VCC +VLL  
DGND  
Figure 3a. 0 V to +10 V Unipolar Voltage Output  
If it is desired to adjust the gain and offset errors to zero, this can  
be accomplished using the circuit shown in Figure 3b. The ad-  
justment procedure is as follows:  
STEP 1 . . . ZERO ADJUST  
Turn all bits OFF and adjust zero trimmer, R4, until the output  
reads 0.000000 volts (1 LSB = 153 µV).  
UNI/BIP CLR/  
SIN/ MSB/LSB/  
STEP 2 . . . GAIN ADJUST  
LBE  
15  
CS  
14  
DB7  
DB0 DB1  
Turn all bits ON and adjust gain trimmer, R1, until the output is  
9.999847 volts. (Full scale is adjusted to 1 LSB less than the  
nominal full scale of 10.000000 volts).  
12 11  
5
AD660  
HBE 16  
SER 17  
CLR 18  
13  
22  
16-BIT LATCH  
S
OUT  
CONTROL  
LOGIC  
10k  
UNI/BIP CLR/  
SIN/ MSB/LSB/  
SPAN/  
BIP  
OFFSET  
DB0 DB1  
LBE  
CS  
DB7  
16-BIT LATCH  
16-BIT DAC  
15  
14  
12 11  
5
+V  
CC  
AD660  
10.05k  
LDAC  
19  
23  
HBE 16  
SER 17  
CLR 18  
13 S  
16-BIT LATCH  
10k  
OUT  
R3 16k  
CONTROL  
LOGIC  
REF IN  
SPAN/  
BIP OFF  
R4  
10k  
21  
20  
V
OUT  
10k  
16-BIT LATCH  
16-BIT DAC  
22  
+10V REF  
AGND  
R2  
50  
LDAC  
19  
23  
Ω
–V  
EE  
24  
REF OUT  
1
2
3
4
10.05k  
10k  
REF IN  
–V  
+V  
+V  
LL  
DGND  
EE  
CC  
21  
20  
Figure 2. AD660 Functional Block Diagram  
OUTPUT  
+10V REF  
ANALOG CIRCUIT CONNECTIONS  
24  
REF OUT  
1
2
3
4
Internal scaling resistors provided in the AD660 may be con-  
nected to produce a unipolar output range of 0 V to +10 V or a  
bipolar output range of –10 V to +10 V. Gain and offset drift  
are minimized in the AD660 because of the thermal tracking of  
the scaling resistors with other device components.  
–V  
+V  
+V  
LL  
EE  
CC  
DGND  
R1 100  
Ω
AGND  
Figure 3b. 0 V to +10 V Unipolar Voltage Output with Gain  
and Offset Adjustment  
UNIPOLAR CONFIGURATION  
The configuration shown in Figure 3a will provide a unipolar  
0 V to +10 V output range. In this mode, 50 Ω resistors are tied  
between the span/bipolar offset terminal (Pin 22) and VOUT  
–6–  
REV. A  
1...3456789...12

下载PDF

与AD660相关器件

型号 品牌 描述 获取价格 数据表
AD660_08 ADI Monolithic 16-Bit Serial/Byte DACPORT

获取价格
AD6600 ADI Dual Channel, Gain-Ranging ADC with RSSI

获取价格
AD6600AST ADI Dual Channel, Gain-Ranging ADC with RSSI

获取价格
AD6600AST ROCHESTER 2-CH 11-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44, PLASTIC, LQFP-44

获取价格
AD6600AST-REEL ADI IC 2-CH 11-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44, PLASTIC, LQFP-44, Analog t

获取价格
AD6600ASTZ ROCHESTER 2-CH 11-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44, PLASTIC, LQFP-44

获取价格

与AD660相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证