Datasheet > AD6402

AD6402

更新时间： 2024-01-14 02:28:47

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
8页	113K
描述
IF Transceiver Subsystem

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技术参数
数据手册

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AD6402 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	SSOP	包装说明：	SSOP-28
针数：	28	Reach Compliance Code：	unknown
ECCN代码：	5A991.G	HTS代码：	8542.39.00.01
风险等级：	5.83	JESD-30 代码：	R-PDSO-G28
JESD-609代码：	e0	长度：	10.21 mm
功能数量：	1	端子数量：	28
最高工作温度：	85 °C	最低工作温度：	-25 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP28,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	2.85,3.1/4.5 V	认证状态：	Not Qualified
座面最大高度：	1.73 mm	子类别：	Other Telecom ICs
表面贴装：	YES	技术：	BIPOLAR
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	OTHER
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	5.3 mm

AD6402 数据手册

AD6402

Table I. P ower Managem ent Functionality

P LL

TL1

CTL2

CTL3

BIAS

LO CK

D MO D

REF

REG

VCO

MO D E

–

OFF

–

SLEEP

ST ANDBY

RXLOCK

RXDMOD

T RANSMIT

RXLOCKP

OFF

T he AD6402 has six operating modes: SLEEP, ST ANDBY,

RXLOCK, RXDMOD, T RANSMIT and RXLOCKP. T hese

are summarized in T able I. T he blocks referred to in T able I are

shown also in Figure 4. T hese modes are described as follows:

IFVCC1

IFVCC2

RSSI

DOUT

IFIN

SLEEP:

T he entire device is shut down.

DFLIP

IFGND

ST ANDBY: All functions except the regulator are shut down.

PLL DMOD

RXLOCK:

T he device locks to a local reference clock using

the lock PLL. T he lock charge pump and divid-

ers are powered up. The VCO is also powered up.

PLLOUT

PLLVCC

PLLGND

REXT

VBAT

VREG

REG

PLL BIAS

REF

RXDMOD: In this mode the lock charge pump and loop

dividers are shut down. The receive mixer, IF strip,

reference and demodulator are powered up.

SLREF

REF

CFILT

COFF

VCO

PLL LOCK

VCOGND

T RANSMIT : T his mode enables the VCO and transmit op

amp. The reference and regulator are also enabled.

REFIN

CTL3

CTL2

/3,/5

RXLOCKP: T his mode may be used in a “prior to” timeslot,

i.e., the slot before the actual active receive

timeslot. In this mode, after lock has been

achieved in the RXLOCK mode, the receive

mixer, VCO and IF strip may then be indepen-

dently powered up from the demodulator loop.

T his can result is power savings, since the de-

modulator may be powered down during the

IF VCO lock acquisition time.

REFSEL

CTL1

VCO

FMMOD2

FMMOD1

TXOUT

TXOUTB

MODOUT

Figure 2. Power Managem ent Schem e

REV. 0

–5–

1 2 3 456 7 8

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