Datasheet > AD6402

AD6402

更新时间： 2024-02-03 05:22:13

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
8页	113K
描述
IF Transceiver Subsystem

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AD6402 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	SSOP	包装说明：	SSOP-28
针数：	28	Reach Compliance Code：	unknown
ECCN代码：	5A991.G	HTS代码：	8542.39.00.01
风险等级：	5.83	JESD-30 代码：	R-PDSO-G28
JESD-609代码：	e0	长度：	10.21 mm
功能数量：	1	端子数量：	28
最高工作温度：	85 °C	最低工作温度：	-25 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP28,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	2.85,3.1/4.5 V	认证状态：	Not Qualified
座面最大高度：	1.73 mm	子类别：	Other Telecom ICs
表面贴装：	YES	技术：	BIPOLAR
电信集成电路类型：	TELECOM CIRCUIT	温度等级：	OTHER
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	5.3 mm

AD6402 数据手册

IF Transceiver Subsystem

AD6402

FUNCTIO NAL BLO CK D IAGRAM

FEATURES

On-Chip Regulator

PLL Dem odulator

On-Chip VCO

No Trim s

Excellent Sensitivity

28-Lead SSOP Package

RSSI

CFILT

LIMITER/FILTER

IFIN

PLL

DEMOD

DOUT

DFILP

TXOUT

TXOUTB

APPLICATIONS

DECT/ PWT/ WLAN

TDMA FM/ FSK System s

PLLOUT

AD6402

VCO

REFSEL

COFF

OFFSET

COMP

VOLTAGE

REGULATOR

REFIN

MODE

CONTROL

FMMOD2

FMMOD1

REF

GENERAL D ESCRIP TIO N

T he AD6402 is a complete transceiver subsystem for use in

high bit rate radio systems employing FM or FSK modulation.

It is optimized for use in time domain multiple access (T DMA)

systems with communications rates of approximately 1 MBPS.

T he AD6402 integrates key functions, including VCOs and a

low drop-out voltage regulator. T he AD6402 operates directly

from an unregulated battery supply of 3.1 V to 4.5 V and pro-

vides a regulated voltage output which can be used for VCO

supply regulation on a companion RF chip such as the AD6401.

VREG VBATT SLREF

CTL1...3

MODOUT

data output. On transmit, it accepts a Gaussian Frequency Shift

Keying (GFSK) baseband signal, low-pass filters the signal if

required using the on-chip op amp and modulates the IF VCO

by varying the bias voltage on an off-chip varactor diode used in

the tank circuit.

T he AD6402 has multiple power-down modes to maximize

battery life. It operates over a temperature range of –25°C to

+85°C and is packaged in a JEDEC standard 28-lead small-

shrink outline (SSOP) surface-mount package.

T he AD6402 transceiver consists of a mixer, integrated IF

bandpass filter, IF limiter with RSSI detection, VCO, PLL

demodulator and a low dropout voltage regulator. On receive, it

downconverts an IF signal in the 110 MHz range to a second

IF frequency, this frequency being determined by the demodu-

lator reference divide ratios. It then filters, amplifies, and de-

modulates this signal. T he AD6402 provides a filtered baseband

REV. 0

Inform ation furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assum ed by Analog Devices for its

use, nor for any infringem ents of patents or other rights of third parties

which m ay result from its use. No license is granted by im plication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.

Tel: 617/ 329-4700

Fax: 617/ 326-8703

World Wide Web Site: http:/ / w w w .analog.com

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