5秒后页面跳转
捷配首页

Datasheet > AD574ALD/+
AD574ALD/+ PDF预览

AD574ALD/+

更新时间： 2024-01-16 14:06:34
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 转换器
页数 文件大小 规格书
13页 1479K
描述
1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP28, HERMETIC SEALED, SIDE BRAZED, CERAMIC, DIP-28

阅读下载

获取价格

AD574ALD/+ 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Active零件包装代码：DIP
包装说明：DIP,针数：28
Reach Compliance Code：unknown风险等级：5.62
Is Samacsys：N最大模拟输入电压：10 V
最小模拟输入电压：-10 V最长转换时间：35 µs
转换器类型：ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码：R-CDIP-T28
JESD-609代码：e0最大线性误差 (EL)：0.0122%
湿度敏感等级：NOT SPECIFIED标称负供电电压：-15 V
模拟输入通道数量：1位数：12
功能数量：1端子数量：28
最高工作温度：70 °C最低工作温度：
输出位码：BINARY输出格式：PARALLEL, WORD
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：5.72 mm
标称供电电压：15 V表面贴装：NO
技术：BIPOLAR温度等级：COMMERCIAL
端子面层：TIN LEAD端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：15.24 mm
Base Number Matches：1

AD574ALD/+ 数据手册

 浏览型号AD574ALD/+的Datasheet PDF文件第7页浏览型号AD574ALD/+的Datasheet PDF文件第8页浏览型号AD574ALD/+的Datasheet PDF文件第9页浏览型号AD574ALD/+的Datasheet PDF文件第11页浏览型号AD574ALD/+的Datasheet PDF文件第12页浏览型号AD574ALD/+的Datasheet PDF文件第13页 
AD574A  
Figure 7 shows a complete timing diagram for the AD574A con-  
vert start operation. R/C should be low before both CE and CS  
are asserted; if R/C is high, a read operation will momentarily  
occur, possibly resulting in system bus contention. Either CE or  
CS may be used to initiate a conversion; however, use of CE is  
recommended since it includes one less propagation delay than  
CS and is the faster input. In Figure 7, CE is used to initiate the  
conversion.  
Table III. Read Timing—Full Control Mode  
Symbol Parameter  
Min Typ Max Units  
1
tDD  
tHD  
tHL  
Access Time (from CE)  
200 ns  
Data Valid After CE Low  
Output Float Delay  
CS to CE Setup  
25  
ns  
2
100 ns  
tSSR  
tSRR  
tSAR  
tHSR  
tHRR  
tHAR  
150  
0
ns  
ns  
ns  
ns  
ns  
ns  
R/C to CE Setup  
AO to CE Setup  
150  
50  
0
CS Valid After CE Low  
R/C High After CE Low  
AO Valid After CE Low  
50  
NOTES  
1tDD is measured with the load circuit of Figure 9 and defined as the time  
required for an output to cross 0.4 V or 2.4 V.  
2tHL is defined as the time required for the data lines to change 0.5 V when  
loaded with the circuit of Figure 10.  
Figure 7. Convert Start Timing  
Once a conversion is started and the STS line goes high, convert  
start commands will be ignored until the conversion cycle is  
complete. The output data buffers cannot be enabled during  
conversion.  
a. High-Z to Logic 1  
Figure 9. Load Circuit for Access Time Test  
b. High-Z to Logic 0  
Figure 8 shows the timing for data read operations. During data  
read operations, access time is measured from the point where  
CE and R/C both are high (assuming CS is already low). If CS  
is used to enable the device, access time is extended by 100 ns.  
a. Logic 1 to High-Z b. Logic 0 to High-Z  
Figure 10. Load Circuit for Output Float Delay Test  
“STAND-ALONE” OPERATION  
The AD574A can be used in a “stand-alone” mode, which is  
useful in systems with dedicated input ports available and thus  
not requiring full bus interface capability.  
In this mode, CE and 12/8 are wired high, CS and AO are wired  
low, and conversion is controlled by R/C. The three-state buff-  
ers are enabled when R/C is high and a conversion starts when  
R/C goes low. This allows two possible control signals—a high  
pulse or a low pulse. Operation with a low pulse is shown in  
Figure 11. In this case, the outputs are forced into the high  
impedance state in response to the falling edge of R/C and return  
Figure 8. Read Cycle Timing  
In the 8-bit bus interface mode (12/8 input wired to DIGITAL  
COMMON), the address bit, AO, must be stable at least 150 ns  
prior to CE going high and must remain stable during the entire  
read cycle. If AO is allowed to change, damage to the AD574A  
output buffers may result.  
Figure 11. Low Pulse for R/C—Outputs Enabled After  
Conversion  
REV. B  
–9–  
1...78910111213

下载PDF

与AD574ALD/+相关器件

型号 品牌 描述 获取价格 数据表
AD574ALN ADI Complete 12-Bit A/D Converter

获取价格
AD574ALN ROCHESTER ADC, Successive Approximation, 12-Bit, 1 Func, 1 Channel, Parallel, Word Access, Bipolar,

获取价格
AD574ALNZ ADI Complete 12-Bit A/D Converter

获取价格
AD574ALP ADI IC,A/D CONVERTER,SINGLE,12-BIT,BIPOLAR,LDCC,28PIN

获取价格
AD574ALX ADI Complete 12-Bit A/D Converter

获取价格
AD574AS ADI Complete 12-Bit A/D Converter

获取价格

与AD574ALD/+相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证