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AD5322ARM PDF预览

AD5322ARM

更新时间: 2024-02-15 09:37:00
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 输入元件光电二极管转换器
页数 文件大小 规格书
25页 1926K
描述
SERIAL INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, PDSO10, MO-187BA, MSOP-10

AD5322ARM 技术参数

Source Url Status Check Date:2013-05-01 14:56:12.058是否无铅: 含铅
是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP10,.19,20
针数:10Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:7.56最大模拟输出电压:5.499 V
最小模拟输出电压:0.001 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:S-PDSO-G10JESD-609代码:e0
长度:3 mm最大线性误差 (EL):0.3906%
湿度敏感等级:1位数:12
功能数量:1端子数量:10
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP10,.19,20封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:3/5 V认证状态:Not Qualified
座面最大高度:1.1 mm最大稳定时间:10 µs
标称安定时间 (tstl):8 µs子类别:Other Converters
最大压摆率:0.45 mA标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:3 mmBase Number Matches:1

AD5322ARM 数据手册

 浏览型号AD5322ARM的Datasheet PDF文件第1页浏览型号AD5322ARM的Datasheet PDF文件第2页浏览型号AD5322ARM的Datasheet PDF文件第3页浏览型号AD5322ARM的Datasheet PDF文件第5页浏览型号AD5322ARM的Datasheet PDF文件第6页浏览型号AD5322ARM的Datasheet PDF文件第7页 
AD5302/AD5312/AD5322  
SPECIFICATIONS  
VDD = 2.5 V to 5.5 V, VREF = 2 V, RL = 2 kΩ to GND, CL = 200 pF to GND, all specifications TMIN to TMAX, unless otherwise noted.  
Table 1.  
A Version1  
Typ  
B Version1  
Typ  
Parameter2  
DC PERFORMANCE3, 4  
Min  
Max  
Min  
Max  
Unit  
Test Conditions/Comments  
AD5302  
Resolution  
8
8
Bits  
LSB  
LSB  
Relative Accuracy  
Differential Nonlinearity  
AD5312  
0.15  
0.02  
1
0.25  
0.15  
0.02  
0.5  
0.25  
Guaranteed monotonic by design over all codes  
Guaranteed monotonic by design over all codes  
Resolution  
10  
0.5  
0.05  
10  
0.5  
0.05  
Bits  
LSB  
LSB  
Relative Accuracy  
Differential Nonlinearity  
AD5322  
4
0.5  
2
0.5  
Resolution  
12  
12  
Bits  
Relative Accuracy  
Differential Nonlinearity  
Offset Error  
2
1ꢀ  
1
3
2
8
1
3
1
LSB  
LSB  
% of FSR  
% of FSR  
mV  
0.2  
0.4  
0.15  
10  
0.2  
0.4  
0.15  
10  
Guaranteed monotonic by design over all codes  
See Figure 3 and Figure 4  
See Figure 3 and Figure 4  
Gain Error  
1
Lower Deadband  
Offset Error Drift5  
ꢀ0  
ꢀ0  
See Figure 3 and Figure 4  
−12  
−12  
ppm of  
FSR/°C  
ppm of  
FSR/°C  
Gain Error Drift5  
−5  
−5  
Power Supply Rejection  
Ratio5  
DC Crosstalk5  
−ꢀ0  
30  
−ꢀ0  
30  
dB  
∆VDD = 10%  
μV  
DAC REFERENCE INPUTS5  
VREF Input Range  
1
0
VDD  
VDD  
1
0
VDD  
VDD  
V
V
MΩ  
kΩ  
dB  
dB  
Buffered reference mode  
Unbuffered reference mode  
Buffered reference mode  
Unbuffered reference mode, input impedance = RDAC  
Frequency = 10 kHz  
Frequency = 10 kHz  
VREF Input Impedance  
>10  
180  
−90  
−80  
>10  
180  
−90  
−80  
Reference Feedthrough  
Channel-to-Channel  
Isolation  
OUTPUT CHARACTERISTICS5  
Minimum Output Voltageꢀ  
0.001  
0.001  
V min  
V max  
A measure of the minimum drive capability of  
the output amplifier  
A measure of the maximum drive capability of  
the output amplifier  
Maximum Output Voltageꢀ  
VDD  
VDD  
0.001  
0.5  
50  
20  
2.5  
5
0.001  
0.5  
50  
20  
2.5  
5
DC Output Impedance  
Short-Circuit Current  
Ω
mA  
mA  
μs  
VDD = 5 V  
VDD = 3 V  
Power-Up Time  
Coming out of power-down mode, VDD = 5 V  
Coming out of power-down mode, VDD = 3 V  
μs  
LOGIC INPUTS5  
Input Current  
VIL, Input Low Voltage  
1
0.8  
0.ꢀ  
0.5  
1
0.8  
0.ꢀ  
0.5  
μA  
V
V
VDD = 5 V 10%  
VDD = 3 V 10%  
VDD = 2.5 V  
V
VIH, Input High Voltage  
Pin Capacitance  
2.4  
2.1  
2.0  
2.4  
2.1  
2.0  
V
V
V
pF  
VDD = 5 V 10%  
VDD = 3 V 10%  
VDD = 2.5 V  
2
3.5  
2
3.5  
Rev. D | Page 3 of 24  
 
 
 
 

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