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AD5316ARU-REEL7 PDF预览

AD5316ARU-REEL7

更新时间: 2024-02-28 06:16:53
品牌 Logo 应用领域
亚德诺 - ADI 转换器光电二极管
页数 文件大小 规格书
24页 528K
描述
2.5 V to 5.5 V, 400 μA, 2-Wire Interface, Quad Voltage Output, 8-/10-/12-Bit DACs

AD5316ARU-REEL7 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.59最大模拟输出电压:5.499 V
最小模拟输出电压:0.001 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:5 mm最大线性误差 (EL):0.293%
湿度敏感等级:1位数:10
功能数量:1端子数量:16
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:3/5 V认证状态:Not Qualified
座面最大高度:1.2 mm最大稳定时间:9 µs
标称安定时间 (tstl):7 µs子类别:Other Converters
最大压摆率:0.9 mA标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

AD5316ARU-REEL7 数据手册

 浏览型号AD5316ARU-REEL7的Datasheet PDF文件第1页浏览型号AD5316ARU-REEL7的Datasheet PDF文件第2页浏览型号AD5316ARU-REEL7的Datasheet PDF文件第4页浏览型号AD5316ARU-REEL7的Datasheet PDF文件第5页浏览型号AD5316ARU-REEL7的Datasheet PDF文件第6页浏览型号AD5316ARU-REEL7的Datasheet PDF文件第7页 
AD5306/AD5316/AD5326  
SPECIFICATIONS  
VDD = 2.5 V to 5.5 V; VREF = 2 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted.  
Table 1.  
A Version1  
Typ  
B Version1  
Typ  
Parameter2  
DC PERFORMANCE3, 4  
Min  
Max  
Min  
Max  
Unit  
Conditions/Comments  
AD5306  
Resolution  
8
8
Bits  
LSB  
LSB  
Relative Accuracy  
Differential Nonlinearity  
0.15  
0.02  
1
0.15  
0.02  
0.625  
0.25  
0.25  
Guaranteed monotonic by  
design over all codes.  
AD5316  
Resolution  
10  
10  
Bits  
LSB  
LSB  
Relative Accuracy  
Differential Nonlinearity  
0.5  
0.05  
4
0.5  
0.05  
2.5  
0.5  
0.5  
Guaranteed monotonic by  
design over all codes.  
AD5326  
Resolution  
12  
2
12  
2
Bits  
LSB  
LSB  
Relative Accuracy  
Differential Nonlinearity  
16  
1
10  
1
0.2  
0.2  
Guaranteed monotonic by  
design over all codes.  
Offset Error  
5
0.3  
10  
60  
5
0.3  
10  
60  
mV  
VDD = 4.5 V, gain = 2;  
see Figure 4 and Figure 5.  
Gain Error  
1.25  
1.25  
% of FSR  
mV  
VDD = 4.5 V, gain = 2;  
see Figure 4 and Figure 5.  
Lower Deadband5  
60  
60  
See Figure 4; lower  
deadband exists only if  
offset error is negative.  
Upper Deadband5  
10  
60  
10  
60  
mV  
See Figure 5; upper  
deadband exists only if  
VREF = VDD and offset plus  
gain error is positive.  
Offset Error Drift6  
Gain Error Drift6  
−12  
–5  
–12  
–5  
ppm of FSR/°C  
ppm of FSR/°C  
dB  
DC Power Supply  
Rejection Ratio6  
–60  
–60  
ΔVDD = 10%.  
DC Crosstalk6  
200  
200  
μV  
RL = 2 kΩ to GND or VDD.  
DAC REFERENCE INPUTS6  
VREF Input Range  
1
VDD  
VDD  
1
VDD  
VDD  
V
Buffered reference mode.  
Unbuffered reference mode.  
0.25  
0.25  
V
VREF Input Impedance  
>10  
180  
90  
>10  
180  
90  
MΩ  
Buffered reference mode  
and power-down mode.  
148  
74  
148  
74  
kΩ  
kΩ  
Unbuffered reference mode;  
0 V to VREF output range.  
Unbuffered reference mode;  
0 V to 2 VREF output range.  
Reference Feedthrough  
−90  
−75  
−90  
−75  
dB  
dB  
Frequency = 10 kHz.  
Frequency = 10 kHz.  
Channel-to-Channel Isolation  
OUTPUT CHARACTERISTICS6  
Minimum Output Voltage7  
0.001  
0.001  
V
This is a measure of the  
minimum and maximum  
drive capability of the  
output amplifier.  
Maximum Output Voltage7  
DC Output Impedance  
VDD − 0.001  
0.5  
VDD − 0.001  
0.5  
V
Ω
Rev. F | Page 3 of 24  
 

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