Datasheet > AD5307ARUZ-REEL71

AD5307ARUZ-REEL71

更新时间： 2022-04-21 15:39:16

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
28页	585K
描述
2.5 V to 5.5 V, 400 muA, Quad Voltage Output

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AD5307ARUZ-REEL71 数据手册

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AD5307/AD5317/AD5327

DAISY CHAINING

POWER SUPPꢀY BYPASSING AND GROUNDING

For systems that contain several DACs, or where the user

wishes to read back the DAC contents for diagnostic purposes,

the SDO pin can be used to daisy-chain several devices together

and provide serial readback. Figure 4 shows the timing diagram

for daisy-chain applications. The daisy-chain mode is enabled

by connecting DCEN high (see Figure 46).

In any circuit where accuracy is important, careful consideration

of the power supply and ground return layout helps to ensure

the rated performance. The printed circuit board on which the

AD5307/AD5317/AD5327 are mounted should be designed so

that the analog and digital sections are separated and confined

to certain areas of the board. If the AD5307/AD5317/AD5327

are in a system where multiple devices require an AGND-to-

DGND connection, the connection should be made at one

point only. The star ground point should be established as close

as possible to the device. The AD5307/AD5317/AD5327 should

have ample supply bypassing of 10 μF in parallel with 0.1 μF on

the supply located as close to the package as possible, ideally right

up against the device. The 10 μF capacitors are the tantalum bead

type. The 0.1 μF capacitor should have low effective series

resistance (ESR) and low effective series inductance (ESI), such

as is typical of the common ceramic types that provide a low

impedance path to ground at high frequencies to handle

transient currents due to internal logic switching.

68HC11

AD5307¹

DIN

MOSI

SCK

PC7

PC6

SCLK

SYNC

LDAC

DCEN

SDO

MISO

DIN

AD5307¹

SCLK

SYNC

LDAC

The power supply lines of the AD5307/AD5317/AD5327 should

use as large a trace as possible to provide low impedance paths

and reduce the effects of glitches on the power supply line. Com-

ponents, such as clocks, with fast switching signals should be

shielded with digital ground to avoid radiating noise to other

parts of the board, and they should never be run near the refer-

ence inputs. Avoid crossover of digital and analog signals. Traces

on opposite sides of the board should run at right angles to each

other. This reduces the effects of feedthrough on the board. A

microstrip technique is by far the best, but it is not always

possible with a double-sided board. In this technique, the com-

ponent side of the board is dedicated to ground plane, and signal

traces are placed on the solder side.

DCEN

SDO

DIN

AD5307¹

SCLK

SYNC

LDAC

DCEN

SDO

ADDITIONAL PINS OMITTED FOR CLARITY.

Figure 46. AD5307 in Daisy-Chain Mode

Rev. C | Page 22 of 28

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