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AD5304BRM PDF预览

AD5304BRM

更新时间： 2024-01-13 06:40:43
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
15页 227K
描述
2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC

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AD5304BRM 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP10,.19,20针数：10
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：1.6
最大模拟输出电压：5.499 V最小模拟输出电压：0.001 V
转换器类型：D/A CONVERTER输入位码：BINARY
输入格式：SERIALJESD-30 代码：S-PDSO-G10
JESD-609代码：e3长度：3 mm
最大线性误差 (EL)：0.2441%湿度敏感等级：1
位数：8功能数量：1
端子数量：10最高工作温度：105 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP10,.19,20
封装形状：SQUARE封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3/5 V
认证状态：Not Qualified座面最大高度：1.1 mm
最大稳定时间：8 µs标称安定时间 (tstl)：6 µs
子类别：Other Converters最大压摆率：0.9 mA
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：3 mm
Base Number Matches：1

AD5304BRM 数据手册

 浏览型号AD5304BRM的Datasheet PDF文件第1页浏览型号AD5304BRM的Datasheet PDF文件第2页浏览型号AD5304BRM的Datasheet PDF文件第3页浏览型号AD5304BRM的Datasheet PDF文件第5页浏览型号AD5304BRM的Datasheet PDF文件第6页浏览型号AD5304BRM的Datasheet PDF文件第7页 
AD5304/AD5314/AD5324  
ABSOLUTE MAXIMUM RATINGS1, 2  
(TA = 25°C unless otherwise noted)  
PIN CONFIGURATION  
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V  
Digital Input Voltage to GND . . . . . . . –0.3 V to VDD + 0.3 V  
Reference Input Voltage to GND . . . . –0.3 V to VDD + 0.3 V  
V
SYNC  
SCLK  
DIN  
1
2
3
4
5
10  
9
DD  
AD5304/  
AD5314/  
AD5324  
V
V
V
A
OUT  
OUT  
OUT  
V
OUTA–D to GND . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V  
B
C
8
Operating Temperature Range  
GND  
7
TOP VIEW  
(Not to Scale)  
Industrial (B Version) . . . . . . . . . . . . . . . –40°C to +105°C  
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C  
Junction Temperature (TJ max) . . . . . . . . . . . . . . . . . . 150°C  
10-Lead microSOIC Package  
6
REFIN  
V
D
OUT  
Power Dissipation . . . . . . . . . . . . . . . . . . (TJ max – TA)/θJA  
θ
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 206°C/W  
JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 44°C/W  
θ
Reflow Soldering  
Peak Temperature . . . . . . . . . . . . . . . . . . . . . 220 +5/–0°C  
Time at Peak Temperature . . . . . . . . . . . . 10 sec to 40 sec  
NOTES  
1Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; and functional operation of  
the device at these or any other conditions above those listed in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability.  
2Transient currents of up to 100 mA will not cause SCR latch-up.  
PIN FUNCTION DESCRIPTIONS  
Pin  
No. Mnemonic Function  
1
2
3
4
5
6
7
8
VDD  
Power Supply Input. These parts can be operated from 2.5 V to 5.5 V and the supply should be decoupled to GND.  
Buffered Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation.  
Buffered Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation.  
Buffered Analog Output Voltage from DAC C. The output amplifier has rail-to-rail operation.  
Reference Input Pin for All Four DACs. It has an input range from 0.25 V to VDD.  
Buffered Analog Output Voltage from DAC D. The output amplifier has rail-to-rail operation.  
Ground Reference Point for All Circuitry on the Part.  
V
V
V
OUTA  
OUTB  
OUTC  
REFIN  
OUTD  
V
GND  
DIN  
Serial Data Input. This device has a 16-bit shift register. Data is clocked into the register on the falling edge of  
the serial clock input. The DIN input buffer is powered down after each write cycle.  
9
SCLK  
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data  
can be transferred at clock speeds up to 30 MHz. The SCLK input buffer is powered down after each write cycle.  
10  
SYNC  
Active Low Control Input. This is the frame synchronization signal for the input data. When SYNC goes low, it  
enables the input shift register and data is transferred in on the falling edges of the following 16 clocks. If SYNC is  
taken high before the sixteenth falling edge of SCLK, the rising edge of SYNC acts as an interrupt and the  
write sequence is ignored by the device.  
ORDERING GUIDE  
Temperature  
Range  
Package  
Description  
Package  
Option  
Branding  
Information  
Model  
AD5304BRM  
AD5314BRM  
AD5324BRM  
–40°C to +105°C  
–40°C to +105°C  
–40°C to +105°C  
10-Lead microSOIC  
10-Lead microSOIC  
10-Lead microSOIC  
RM-10  
RM-10  
RM-10  
DBB  
DCB  
DDB  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although  
the AD5304/AD5314/AD5324 features proprietary ESD protection circuitry, permanent damage  
may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD  
precautions are recommended to avoid performance degradation or loss of functionality.  
WARNING!  
ESD SENSITIVE DEVICE  
REV. B  
–4–  
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