AD5300BRT-REEL

更新时间： 2024-02-15 22:46:07

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
12页	202K
描述
+2.7 V to +5.5 V, 140 uA, Rail-to-Rail Output 8-Bit DAC in an SOT-23

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AD5300BRT-REEL 数据手册

AD5300

300

250

200

150

100

300

250

1.0

0.9

= 5V

THREE–STATE

CONDITION

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

200

150

100

+105؇C

+25؇C

–40؇C

–40

120

2.7

3.2

3.7

4.2

– V

4.7

5.2

2.7

3.2

3.7

4.2

– V

4.7

5.2

TEMPERATURE – ؇C

Figure 11. Supply Current vs.

Temperature

Figure 13. Power-Down Current vs.

Supply Voltage

Figure 12. Supply Current vs.

Supply Voltage

800

600

= 25؇C

CH 2

CLK

CH 2

CLK

400

200

OUT

= 5V

CH 1

HALF-SCALE CODE CHANGE

40 HEX – C0 HEX

FULL-SCALE CODE CHANGE

00 HEX – FF HEX

CH1

= 5V

= 25؇C

OUTPUT LOADED WITH

2k⍀ AND 200pF TO GND

OUTPUT LOADED WITH

2k⍀ AND 200pF TO GND

= 3V

CH1 1V, CH 2 5V, TIME BASE = 1␮s/DIV

CH1 1V, CH2 5V, TIME BASE = 1␮s/DIV

– V

LOGIC

Figure 14. Supply Current vs. Logic

Input Voltage

Figure 16. Half-Scale Settling Time

Figure 15. Full-Scale Settling Time

2.54

LOADED WITH 2k⍀

= 5V

2k⍀ LOAD

AND 200pF TO GND

CH2

TO V

CLK

CODE CHANGE:

80 HEX TO 7F HEX

2.52

2.50

2.48

2.46

CH1

CH2

OUT

CH1

CH1 1V, CH2 1V, TIME BASE = 20␮s/DIV

CH1 1V, CH2 5V, TIME BASE = 5␮s/DIV

500ns/DIV

Figure 17. Power-On Reset to 0 V

Figure 19. Digital-to-Analog Glitch

Impulse

Figure 18. Exiting Power-Down

(7F Hex Loaded)

REV. C

–7–

1...4 5 678 9 10...12

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