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AD5282BRU200-REEL7

更新时间： 2024-02-05 08:40:23
品牌 Logo 应用领域
亚德诺 - ADI 数字电位计
页数 文件大小 规格书
28页 964K
描述
Single/Dual,15 V/5 V,256-Position I2C-Compatible Digital Potentiometer

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AD5282BRU200-REEL7 数据手册

 浏览型号AD5282BRU200-REEL7的Datasheet PDF文件第3页浏览型号AD5282BRU200-REEL7的Datasheet PDF文件第4页浏览型号AD5282BRU200-REEL7的Datasheet PDF文件第5页浏览型号AD5282BRU200-REEL7的Datasheet PDF文件第7页浏览型号AD5282BRU200-REEL7的Datasheet PDF文件第8页浏览型号AD5282BRU200-REEL7的Datasheet PDF文件第9页 
AD5ꢀ80/AD5ꢀ8ꢀ  
-IN CONFIGURATIONS AND FUNCTION DESCRI-TIONS  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
O
A
A
2
A
W
B
O
1
1
1
1
1
W
B
V
2
L
W
B
O
AD5280  
TOP VIEW  
2
2
AD5282  
V
V
V
V
SS  
L
DD  
TOP VIEW  
V
SHDN  
SCL  
GND  
AD1  
AD0  
DD  
SS  
SHDN  
GND  
AD1  
AD0  
8
SCL  
SDA  
SDA  
Figure 4. AD5280 Pin Configuration  
Figure 5. AD5282 Pin Configuration  
Table 5. AD5282 Pin Function Descriptions  
Table 4. AD5280 Pin Function Descriptions  
Pin No. Mnemonic Description  
Pin No.  
Mnemonic Description  
1
2
3
/
5
O1  
A1  
W1  
B1  
Logic Output Terminal O1.  
1
2
3
/
A
W
B
Resistor Terminal A.  
Wiper Terminal W.  
Resistor Terminal B.  
Positive Power Supply. Specified for  
operation from 5 V to 15 V (sum of |VDD|  
+ |VSS| ≤ 15 V).  
Active Low, Asynchronous Connection  
of Wiper W to Terminal B and Open  
Circuit of Terminal A. RDAC register  
contents unchanged. SHDN should tie  
to VL if not used. Can also be used as a  
programmable preset in power-up.  
Resistor Terminal A1.  
Wiper Terminal W1.  
Resistor Terminal B1.  
Positive Power Supply. Specified for  
operation from 5 V to 15 V (sum of |VDD|  
+ |VSS| ≤ 15 V).  
Active Low, Asynchronous Connection  
of Wiper W to Terminal B and Open  
Circuit of Terminal A. RDAC register  
contents unchanged. SHDN should tie  
to VL if not used. Can be also used as a  
programmable preset in power-up.  
VDD  
VDD  
5
SHDN  
6
SHDN  
6
7
8
SCL  
SDA  
AD0  
Serial Clock Input.  
Serial Data InputꢀOutput.  
7
8
9
SCL  
SDA  
AD0  
Serial Clock Input.  
Serial Data InputꢀOutput.  
Programmable Address Bit 0 for  
Multiple Package Decoding. Bit AD0  
and Bit AD1 provide four possible  
addresses.  
Programmable Address Bit 1 for  
Multiple Package Decoding. Bit AD0  
and Bit AD1 provide four possible  
addresses.  
Programmable Address Bit 0 for  
Multiple Package Decoding. Bit AD0  
and Bit AD1 provide four possible  
addresses.  
Programmable Address Bit 1 for  
Multiple Package Decoding. Bit AD0  
and Bit AD1 provide four possible  
addresses.  
9
AD1  
10  
AD1  
10  
11  
GND  
VSS  
Common Ground.  
11  
12  
GND  
VSS  
Common Ground.  
Negative Power Supply. Specified for  
operation from 0 V to −5 V (sum of |VDD|  
+ |VSS| ≤ 15 V).  
Negative Power Supply. Specified for  
operation from 0 V to −5 V (sum of |VDD|  
+ |VSS| ≤ 15 V).  
Logic Supply Voltage. Needs to be less  
than or equal to VDD and at the same  
voltage as the digital logic controlling  
the AD5282.  
12  
13  
O2  
VL  
Logic Output Terminal O2.  
13  
VL  
Logic Supply Voltage. Needs to be less  
than or equal to VDD and at the same  
voltage as the digital logic controlling  
the AD5280.  
1/  
15  
16  
B2  
W2  
A2  
Resistor Terminal B2.  
Wiper Terminal W2.  
Resistor Terminal A2.  
1/  
O1  
Logic Output Terminal O1.  
Rev. C | Page 6 of 28  
 
1...3456789...28

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