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AD5252_15

更新时间: 2022-02-26 13:53:31
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亚德诺 - ADI /
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28页 575K
描述
Dual 64-/256-Position IC Nonvolatile Memory Digital Potentiometers

AD5252_15 数据手册

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Data Sheet  
AD5251/AD5252  
SW  
A
LAYOUT AND POWER SUPPLY BIASING  
A
X
It is always a good practice to employ a compact, minimum  
lead-length layout design. The leads to the input should be as  
direct as possible, with a minimum conductor length. Ground  
paths should have low resistance and low inductance.  
N
SW(2 – 1)  
W
X
R
S
RDAC  
WIPER  
N
SW(2 – 2)  
REGISTER  
AND  
DECODER  
Similarly, it is also good practice to bypass the power supplies  
with quality capacitors. Low equivalent series resistance (ESR)  
1 μF to 10 μF tantalum or electrolytic capacitors should be  
applied at the supplies to minimize any transient disturbance  
and filter low frequency ripple. Figure 39 illustrates the basic  
supply-bypassing configuration for the AD5251/AD5252.  
SW(1)  
SW(0)  
R
R
S
S
N
R
= R /2  
AB  
S
DIGITAL  
SW  
B
AD5251/AD5252  
CIRCUITRY  
OMITTED FOR  
CLARITY  
B
X
V
DD  
V
DD  
+
C1  
C3  
C4  
Figure 40. Equivalent RDAC Structure  
10F  
0.1F  
0.1F  
+
PROGRAMMABLE RHEOSTAT OPERATION  
C2  
10F  
V
SS  
V
If either the W-to-B or W-to-A terminal is used as a variable  
resistor, the unused terminal can be opened or shorted with W;  
such operation is called rheostat mode (see Figure 41). The  
resistance tolerance can range 20%.  
SS  
GND  
Figure 39. Power Supply-Bypassing Configuration  
A
A
A
The ground pin of the AD5251/AD5252 is used primarily as a  
digital ground reference. To minimize the digital ground  
bounce, the AD5251/AD5252 ground terminal should be joined  
remotely to the common ground (see Figure 39).  
W
W
W
B
B
B
Figure 41. Rheostat Mode Configuration  
DIGITAL POTENTIOMETER OPERATION  
The nominal resistance of the AD5251/AD5252 has 64/256  
contact points accessed by the wiper terminal, plus the B terminal  
contact. The 6-/8-bit data-word in the RDAC register is decoded  
to select one of the 64/256 settings. The wipers first connection  
starts at the B terminal for Data 0x00. This B terminal connection  
has a wiper contact resistance, RW, of 75 Ω, regardless of the  
nominal resistance. The second connection (the AD5251 10 kΩ  
part) is the first tap point where RWB = 231 Ω (RWB = RAB/64 +  
RW = 156 Ω + 75 Ω) for Data 0x01, and so on. Each LSB data  
value increase moves the wiper up the resistor ladder until the  
last tap point is reached at RWB = 9893 Ω. See Figure 40 for a  
simplified diagram of the equivalent RDAC circuit.  
The structure of the RDAC is designed to emulate the  
performance of a mechanical potentiometer. The RDAC  
contains a string of resistor segments with an array of analog  
switches that act as the wiper connection to the resistor array.  
The number of points is the resolution of the device. For  
example, the AD5251/AD5252 emulate 64/256 connection  
points with 64/256 equal resistance, RS, allowing them to  
provide better than 1.5%/0.4% resolution.  
Figure 40 provides an equivalent diagram of the connections  
between the three terminals that make up one channel of the  
RDAC. Switches SWA and SWB are always on, but only one of  
switches SW(0) to SW(2N – 1) can be on at a time (determined by  
the setting decoded from the data bit). Because the switches are  
nonideal, there is a 75 Ω wiper resistance, RW. Wiper resistance  
is a function of supply voltage and temperature: Lower supply  
voltages and higher temperatures result in higher wiper  
resistances. Consideration of wiper resistance dynamics is  
important in applications in which accurate prediction of  
output resistance is required.  
The general equation that determines the digitally programmed  
output resistance between W and B is  
AD5251: RWB(D) = (D/64) × RAB + 75 Ω  
AD5252: RWB(D) = (D/256) × RAB + 75 Ω  
(1)  
(2)  
where:  
D is the decimal equivalent of the data contained in the  
RDAC latch.  
R
AB is the nominal end-to-end resistance.  
Rev. D | Page 23 of 28  
 
 
 
 
 
 
 

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