AD5246
TERMINAL VOLTAGE OPERATING RANGE
POWER-UP SEQUENCE
The AD5246 VDD and GND power supply defines the boundary
conditions for proper 3-terminal digital potentiometer
operation. Supply signals present on terminals B and W that
exceed VDD or GND will be clamped by the internal forward
biased diodes (see Figure 32).
Since the ESD protection diodes limit the voltage compliance at
terminals B and W (see Figure 32), it is important to power
VDD/GND before applying any voltage to terminals B and W;
otherwise, the diode will be forward biased such that VDD will be
powered unintentionally and may affect the rest of the user’s
circuit. The ideal power-up sequence is in the following order:
GND, VDD, digital inputs, and then VB/VW. The relative order of
powering VB and VW and the digital inputs is not important as
long as they are powered after VDD/GND.
V
DD
B
LAYOUT AND POWER SUPPLY BYPASSING
W
It is a good practice to employ a compact, minimum lead-length
layout design. The leads to the inputs should be as direct as
possible with a minimum conductor length. Ground paths
should have low resistance and low inductance.
GND
Figure 32. Maximum Terminal Voltages Set by VDD and GND
Similarly, it is a good practice to bypass the power supplies with
quality capacitors for optimum stability. Supply leads to the
device should be bypassed with 0.01 µF to 0.1 µF disc or chip
ceramic capacitors. Low ESR 1 µF to 10 µF tantalum or
electrolytic capacitors should also be applied at the supplies to
minimize any transient disturbance and low frequency ripple
(see Figure 34). Note that the digital ground should also be
joined remotely to the analog ground at one point to minimize
the ground bounce.
MAXIMUM OPERATING CURRENT
At low code values, the user should be aware that due to low
resistance values, the current through the RDAC may exceed
the 5 mA limit. In Figure 33, a 5 V supply is placed on the wiper,
and the current through terminals W and B is plotted with
respect to code. A line is also drawn denoting the 5 mA current
limit. Note that at low code values (particularly for the 5 kΩ and
10 kΩ options), the current level increases significantly. Care
should be taken to limit the current flow between W and B in
this state to a maximum continuous current of 5 mA and a
maximum pulse current of no more than 20 mA. Otherwise,
degradation or possible destruction of the internal switch
contacts can occur.
V
DD
V
DD
+
10µF
C3
C1
0.1µF
AD5246
GND
100.00
Figure 34. Power Supply Bypassing
10.00
5mA CURRENT LIMIT
R
= 5kΩ
AB
1.00
R
= 10kΩ
AB
R
= 50kΩ
AB
0.10
0.01
R
= 100k
96
Ω
AB
64
80
112
128
0
16
32
48
CODE (Decimal)
Figure 33. Maximum Operating Current
Rev. 0 | Page 14 of 20