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AD5207BRU50-REEL7 PDF预览

AD5207BRU50-REEL7

更新时间： 2024-02-19 16:14:08
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 光电二极管
页数 文件大小 规格书
17页 1314K
描述
DUAL 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO14, 1.10 MM HEIGHT, TSSOP-14

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AD5207BRU50-REEL7 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP,针数：14
Reach Compliance Code：unknown风险等级：5.84
Is Samacsys：N其他特性：IT CAN ALSO OPERATE FROM A +/-2.2V TO +/-2.7V DUAL SUPPLY
标称带宽：0.125 kHz控制接口：3-WIRE SERIAL
转换器类型：DIGITAL POTENTIOMETERJESD-30 代码：R-PDSO-G14
JESD-609代码：e0长度：5 mm
湿度敏感等级：1功能数量：2
位置数：256端子数量：14
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：240认证状态：COMMERCIAL
电阻定律：LINEAR最大电阻容差：30%
最大电阻器端电压：5 V最小电阻器端电压：
座面最大高度：1.2 mm标称供电电压：5 V
表面贴装：YES标称温度系数：500 ppm/ °C
温度等级：AUTOMOTIVE端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
标称总电阻：50000 Ω宽度：4.4 mm
Base Number Matches：1

AD5207BRU50-REEL7 数据手册

 浏览型号AD5207BRU50-REEL7的Datasheet PDF文件第9页浏览型号AD5207BRU50-REEL7的Datasheet PDF文件第10页浏览型号AD5207BRU50-REEL7的Datasheet PDF文件第11页浏览型号AD5207BRU50-REEL7的Datasheet PDF文件第13页浏览型号AD5207BRU50-REEL7的Datasheet PDF文件第14页浏览型号AD5207BRU50-REEL7的Datasheet PDF文件第15页 
AD5207  
Table IV.  
position of the potentiometer divider. Since AD5207 is capable  
for dual supplies, the general equation defining the output volt-  
age with respect to ground for any given input voltage applied to  
terminals AB is:  
D
(DEC)  
RWB  
(ꢀ)  
Output State  
255  
128  
1
10006  
5045  
84  
Full-Scale (RAB – 1 LSB + RW)  
Midscale  
1 LSB  
D
256  
256 − D  
256  
(3)  
VW D =  
VA +  
VB  
(
)
0
45  
Zero-Scale (Wiper Contact Resistance)  
Operation of the digital potentiometer in the divider mode  
Note that in the zero-scale condition a finite wiper resistance of  
45 Ω is present. Care should be taken to limit the current flow  
between W and B in this state to a maximum current of no more  
than 5 mA. Otherwise, degradation or possibly destruction of  
the internal switch contacts can occur.  
results in more accurate operation over temperature. Unlike the  
rheostat mode, the output voltage is dependent on the ratio of  
RWA and RWB and not the absolute values; therefore, the drift  
reduces to 15 ppm/°C. There is no voltage polarity constraint  
between Terminals A, B, and W as long as the terminal voltage  
Similar to the mechanical potentiometer, the resistance of the  
RDAC between the wiper W and Terminal A also produces a  
digitally controlled resistance RWA. When these terminals are used,  
the B Terminal should be let open or tied to the wiper terminal.  
Setting the resistance value for RWA starts at a maximum value  
of resistance and decreases as the data loaded in the latch is  
increased in value. The general equation for this operation is:  
stays within VSS < VTERM < VDD  
.
RDAC CIRCUIT SIMULATION MODEL  
The internal parasitic capacitances and the external capacitive  
loads dominate the ac characteristics of the RDACs. Config-  
ured as a potentiometer divider the –3 dB bandwidth of the  
AD5207BRU10 (10 kΩ resistor) measures 600 kHz at half  
scale. TPC 16 provides the large signal BODE plot characteris-  
tics of the three available resistor versions 10 kΩ and 50 kΩ.  
The gain flatness versus frequency graph, TPC 16, predicts  
filter applications performance. A parasitic simulation model has  
been developed and is shown in Figure 9. Listing I provides a  
macro model net list for the 10 kΩ RDAC:  
256 – D  
256  
(2)  
RWA D =  
× RAB + RW  
(
)
For example, when RAB = 10 kΩ, B terminal is either open or  
tied to W, the following output resistance, RWA, will be set for  
the following RDAC latch codes.  
RDAC  
10kꢀ  
Table V.  
A
B
D
(DEC)  
RWA  
(ꢀ)  
C
C
B
A
C
70pF  
W
Output State  
255  
128  
1
84  
Full-Scale (RAB/256 + RW)  
Midscale  
1 LSB  
C
= 45pF  
C
= 45pF  
A
B
5045  
10006  
10045  
W
0
Zero-Scale  
Figure 9. RDAC Circuit Simulation Model for RDAC = 10 kΩ  
The typical distribution of RAB from channel to channel matches  
within 1%. Device-to-device matching is process-lot depen-  
dent and is possible to have 30% variation. The change in RAB  
with temperature has a 500 ppm/°C temperature coefficient.  
Listing I. Macro Model Net List for RDAC  
.PARAM D=255, RDAC=10E3  
*
.SUBCKT DPOT (A,W)  
PROGRAMMING THE POTENTIOMETER DIVIDER  
Voltage Output Operation  
*
The digital potentiometer easily generates an output voltage  
proportional to the input voltage. Let’s ignore the effect of  
the wiper resistance for the moment. For example, when con-  
necting A Terminal to 5 V and B Terminal to ground, it produces  
a programmable output voltage at the wiper starting at zero  
volts up to 1 LSB less than 5 V. Each LSB of voltage is equal  
to the voltage applied across terminal AB divided by the 256  
CA A 0 45E-12  
RAW A W {(1-D/256)*RDAC+50}  
CW W 0 70E-12  
RBW W B {D/256*RDAC+50}  
CB B 0 45E-12  
*
.ENDS DPOT  
REV. 0  
–11–  
1...9101112131415...17

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