AD5204/AD5206
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC
1
2
3
4
5
6
7
8
9
24 B4
23 W4
22 A4
21 B2
20 W2
19 A2
NC
GND
CS
AD5204
TOP VIEW
(Not to Scale)
PR
V
DD
18
A1
SHDN
SDI
17 W1
16 B1
15 A3
14 W3
13 B3
CLK
SDO 10
11
V
SS
NC 12
NC = NO CONNECT
Figure 6. AD5204 SOIC/TSSOP/PDIP Pin Configuration
Table 3. AD5204 SOIC/TSSOP/PDIP Pin Function Descriptions
Pin No. Name Description
1, 2, 12
3
4
NC
GND
CS
Not Connected.
Ground.
Chip Select Input (Active Low). When CS returns high, data in the serial input register is decoded based on the address
bits, and then it is loaded into the target RDAC latch.
ꢀ
PR
Preset to Midscale (Active Low). This pin sets the RDAC registers to 0x80.
6
7
VDD
SHDN
SDI
CLK
SDO
VSS
B3
W3
A3
Positive Power Supply. This pin is specified for operation at both 3 V and ꢀ V. It is the sum of |VDD| + |VSS| < ꢀ.ꢀ V.
Terminal A Open-Circuit Shutdown (Active Low Input). This pin controls VR 1 through VR 4.
8
Serial Data Input. Data is input MSB first.
9
Serial Clock Input. This pin is positive edge triggered.
10
11
13
14
1ꢀ
16
17
18
19
20
21
22
23
24
Serial Data Output. This pin is an open-drain transistor and requires a pull-up resistor.
Negative Power Supply. This pin is specified for operation at both 0 V and −2.7 V. It is the sum of |VDD| + |VSS| < ꢀ.ꢀ V.
Terminal B RDAC 3.
Wiper RDAC 3. Address = 0102.
Terminal A RDAC 3.
Terminal B RDAC 1.
Wiper RDAC 1. Address = 0002.
Terminal A RDAC 1.
B1
W1
A1
A2
Terminal A RDAC 2.
W2
B2
A4
W4
B4
Wiper RDAC 2. Address = 0012.
Terminal B RDAC 2.
Terminal A RDAC 4.
Wiper RDAC 4. Address = 0112.
Terminal B RDAC 4.
Rev. C | Page 7 of 20