Datasheet > AD5206_15

AD5206_15

更新时间： 2022-02-26 13:53:33

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
20页	371K
描述
4-/6-Channel Digital Potentiometers

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AD5206_15 数据手册

AD5204/AD5206

Parameter

Symbol

Conditions

Min

Typ¹

Max

Unit

INTERFACE TIMING CHARACTERISTICS^{7, 11, 12}

Input Clock Pulse Width

Data Setup Time

Data Hold Time

CLK-to-SDO Propagation Delay¹³

t_CH, t_CL

t_DS

t_DH

t_PD

t_CSS

Clock level high or low

ꢀ

R_L= 2 kΩ , C_L< 20 pF

1ꢀ0

CS Setup Time

1ꢀ

CS High Pulse Width

t_CSW

t_RS

t_CSH0

t_CSH1

t_CS1

Reset Pulse Width

CLK Fall to CS Fall Setup

CLK Fall to CS Rise Hold Time

CS Rise to Clock Rise Setup

¹Typicals represent average readings at 2ꢀ°C and V_DD= ꢀ V.

²Applies to all VRs.

³Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions.

R-DNL measures the relative step change from the ideal position between successive tap positions. Parts are guaranteed monotonic. See the test circuit in Figure 28.

_W= V_DD/R for both V_DD= 3 V and V_DD= ꢀ V.

⁴V_AB= V_DD, wiper (V_W) = no connect.

^ꢀINL and DNL are measured at V_Wwith the RDAC configured as a potentiometer divider similar to a voltage output DAC. V_A= V_DDand V_B= 0 V. DNL specification limits

of 1 LSB maximum are guaranteed monotonic at operating conditions. See the test circuit in Figure 27.

⁶Resistor Terminal A, Terminal B, and Wiper W have no limitations on polarity with respect to each other.

⁷Guaranteed by design and not subject to production test.

⁸Measured at the Ax terminals. All Ax terminals are open circuited in shutdown mode.

⁹P_DISSis calculated from (I_DD× V_DD). CMOS logic level inputs result in minimum power dissipation.

¹⁰All dynamic characteristics use V_DD= ꢀ V.

¹¹Applies to all parts.

¹²See the timing diagrams (Figure 3 to Figure ꢀ) for the location of the measured values. All input control voltages are specified with t_R= t_F= 2.ꢀ ns (10% to 90% of 3 V)

and timed from a voltage level of 1.ꢀ V. Switching characteristics are measured using both V_DD= 3 V and V_DD= ꢀ V.

¹³The propagation delay depends on the values of V_DD, R_L, and C_L(see the Operation section).

Rev. C | Page 4 of 20

1 2 345 6 7...20

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