AD5204/AD5206
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
INTERFACE TIMING CHARACTERISTICS7, 11, 12
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CLK-to-SDO Propagation Delay13
tCH, tCL
tDS
tDH
tPD
tCSS
Clock level high or low
20
ꢀ
ꢀ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RL = 2 kΩ , CL < 20 pF
1
1ꢀ0
CS Setup Time
1ꢀ
40
90
0
CS High Pulse Width
tCSW
tRS
tCSH0
tCSH1
tCS1
Reset Pulse Width
CLK Fall to CS Fall Setup
CLK Fall to CS Rise Hold Time
CS Rise to Clock Rise Setup
0
10
1 Typicals represent average readings at 2ꢀ°C and VDD = ꢀ V.
2 Applies to all VRs.
3 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions.
R-DNL measures the relative step change from the ideal position between successive tap positions. Parts are guaranteed monotonic. See the test circuit in Figure 28.
I
W = VDD/R for both VDD = 3 V and VDD = ꢀ V.
4 VAB = VDD, wiper (VW) = no connect.
ꢀ INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of 1 LSB maximum are guaranteed monotonic at operating conditions. See the test circuit in Figure 27.
6 Resistor Terminal A, Terminal B, and Wiper W have no limitations on polarity with respect to each other.
7 Guaranteed by design and not subject to production test.
8 Measured at the Ax terminals. All Ax terminals are open circuited in shutdown mode.
9 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
10 All dynamic characteristics use VDD = ꢀ V.
11 Applies to all parts.
12 See the timing diagrams (Figure 3 to Figure ꢀ) for the location of the measured values. All input control voltages are specified with tR = tF = 2.ꢀ ns (10% to 90% of 3 V)
and timed from a voltage level of 1.ꢀ V. Switching characteristics are measured using both VDD = 3 V and VDD = ꢀ V.
13 The propagation delay depends on the values of VDD, RL, and CL (see the Operation section).
Rev. C | Page 4 of 20