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AD5172BRMZ50 PDF预览

AD5172BRMZ50

更新时间: 2024-02-01 02:14:19
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管转换器电阻器
页数 文件大小 规格书
28页 826K
描述
256-Position, One-Time Programmable, Dual Channel, I<sup>2</sup>C Digital Potentiometer

AD5172BRMZ50 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP10,.19,20针数:10
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.25
其他特性:IT CAN ALSO OPERATE FROM 5 V NOMINAL SUPPLY标称带宽:0.1 kHz
控制接口:2-WIRE SERIAL转换器类型:DIGITAL POTENTIOMETER
JESD-30 代码:S-PDSO-G10JESD-609代码:e3
长度:3 mm湿度敏感等级:1
功能数量:2位置数:256
端子数量:10最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP10,.19,20
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3/5 V
认证状态:Not Qualified电阻定律:LINEAR
最大电阻容差:20%最大电阻器端电压:5.5 V
最小电阻器端电压:座面最大高度:1.1 mm
子类别:Digital Potentiometers标称供电电压:3 V
表面贴装:YES标称温度系数:35 ppm/ °C
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
标称总电阻:50000 Ω宽度:3 mm
Base Number Matches:1

AD5172BRMZ50 数据手册

 浏览型号AD5172BRMZ50的Datasheet PDF文件第3页浏览型号AD5172BRMZ50的Datasheet PDF文件第4页浏览型号AD5172BRMZ50的Datasheet PDF文件第5页浏览型号AD5172BRMZ50的Datasheet PDF文件第7页浏览型号AD5172BRMZ50的Datasheet PDF文件第8页浏览型号AD5172BRMZ50的Datasheet PDF文件第9页 
AD5172/AD5173  
Data Sheet  
Parameter  
Symbol  
Conditions  
Min  
Typ 1  
Max  
Unit  
POWER SUPPLIES  
Power Supply Range  
OTP Supply Voltage9, 10  
Supply Current  
OTP Supply Current9, 11, 12  
Power Dissipation13  
VDD_RANGE  
VDD_OTP  
IDD  
IDD_OTP  
PDISS  
2.7  
5.6  
5.5  
5.8  
6
V
V
µA  
mA  
µW  
TA = 25°C  
VIH = 5 V or VIL = 0 V  
VDD_OTP = 5.0 V, TA = 25°C  
VIH = 5 V or VIL = 0 V,  
VDD = 5 V  
5.7  
3.5  
100  
33  
Power Supply Sensitivity  
PSS  
VDD = 5 V 10%,  
code = midscale  
0.02  
0.08  
%/%  
DYNAMIC CHARACTERISTICS14  
Bandwidth, −3 dB  
BW  
RAB = 10 kΩ, code = 0x80  
RAB = 50 kΩ, code = 0x80  
RAB = 100 kΩ, code = 0x80  
VA = 1 V rms, VB = 0 V,  
f = 1 kHz, RAB = 10 kΩ  
VA = 5 V, VB = 0 V, 1 LSB  
error band  
RWB = 5 kΩ, RS = 0 Ω  
600  
100  
40  
kHz  
kHz  
kHz  
%
Total Harmonic Distortion  
VW Settling Time  
THDW  
tS  
0.1  
2
9
µs  
Resistor Noise Voltage Density  
eN_WB  
nV/√Hz  
1 Typical specifications represent average readings at 25°C and VDD = 5 V.  
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper  
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.  
3 VA = VDD, VB = 0 V, wiper (VW) = no connect.  
4 Specifications apply to all VRs.  
5 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits  
of 1 LSB maximum are guaranteed monotonic operating conditions.  
6 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.  
7 Guaranteed by design, but not subject to production test.  
8 Measured at Terminal A. Terminal A is open circuited in shutdown mode.  
9 The minimum voltage requirement on the VIH is 0.7 V × VDD. For example, VIH minimum = 3.5 V when VDD = 5 V. It is typical for the SCL and SDA resistors to be pulled up to VDD  
.
However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-up resistors.  
10 Different from the operating power supply; the power supply for OTP is used one time only.  
11 Different from the operating current; the supply current for OTP lasts approximately 400 ms for one time only.  
12 See Figure 30 for an energy plot during an OTP program.  
13  
P
is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.  
DISS  
14 All dynamic characteristics use VDD = 5 V.  
Rev. I | Page 6 of 28  
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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