AD2S99
Coupling capacitor C3, and resistor to GND R3, between the
SYNREF output of the AD2S99 and the REF input pin of the
AD2S82A are optional. For additional information on selecting
component values for the AD2S82A, please refer to the
AD2S82A data sheet or the application note “Passive Compo-
nent Selection and Dynamic Modeling for the AD2S80 Series
Resolver-to-Digital Converters” (AN-266).
AD2S99/AD2S82A TYPICAL CONFIGURATION
Figure 4 shows a typical circuit configuration for the AD2S99
Oscillator and the AD2S82A Resolver-to-Digital Converter.
The maximum level of the SIN and COS input signals to the
AD2S82A should be 2 V rms ±10%. All the analog ground sig-
nals should be star connected to the AD2S82A AGND pin. If
shielded twisted pair cables are used for the resolver signals, the
shields should also be terminated at the AD2S82A AGND pin.
R3, C3 OPTIONAL
C3
VELOCITY
OUTPUT
SYNREF
COS
C5
R5
R3
COS
R2
C4
C1
R1
C2
REF
SIN
–5V
AGND
0V
4.7µF
R4
RESOLVER
AGND
R6
SIN
0.1µF
10µF
6
5
4
3
2
1
44 43 42 41 40
SIN
I/P
0.1µF
–V
S
7
8
39
38
10µF
3
2
1
20 19
–12V
0.1µF
+V
S
RC
EXC
EXC
NC
4
5
6
7
8
18
17
16
+12V
DIR
NC
MSB DB1
9
37
36
35
SIN
DGND
COS
AD2S99
TOP VIEW
(Not to Scale)
10
BUSY
AGND
DB2 11
DB3 12
DB4 13
DB5 14
DB6 15
DATA LOAD
15 NC
14 NC
34 COMP
33 SC2
32 SC1
AD2S82A
TOP VIEW
(Not to Scale)
NC
9
10 11 12 13
DIGITAL GND
31
0.1µF
4.7µF
50k
DB7
DB8
16
17
30 INHIBIT
29 NC
+5V
NC = NO CONNECT
LOS
18 19 20 21 22 23 24 25 26 27 28
DIGITAL
OUTPUT
DATA
+5V
SEL1 = GND
0.1µF
10µF
SEL2 = V
SS
DGND
F
= 10kHz
OUT
Figure 4. AD2S99 and AD2S82A Example Configuration
–6–
REV. B