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AD1959YRSZ

更新时间： 2024-02-23 00:11:33

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
8页	108K
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AD1959YRSZ 数据手册

AD1959

Table I. DAC Control Register

Bit 11:10

Bit 9:8

Bit 7

Bit 6

Bit 5:4

Bit 3:2

Bit 1:0

Interpolation

Factor

Serial Data

Width

Serial Data

Format

De-Emphasis

Filter

SPI Register

Address

Output Phase

Soft Mute

00 = 8×*

00 = 24 Bits*

01 = 20 Bits

10 = 16 Bits

11 = 16 Bits

0 = Noninverted*

1 = Inverted

0 = No Mute*

1 = Muted

00 = I²S*

00 = Right Justified

10 = DSP

11 = Left Justified

00 = None*

01 = 44.1 kHz

10 =32 kHz

01 = 4×

10 = 2×

11 = Not Allowed

11 = 48 kHz

*Default Setting.

Table II. DAC Volume Registers

Bit 1:0

it 15:2

Volume

SPI Register Address

14 Bits, Unsigned

00 = Left Volume

10 = Right Volume

Default is full volume.

Table III. PLL Control Register

Bit 11

Bit 10

Bit 9

Bit 8

Bit 7:6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1:0

PLL2

Power-

Down

PLL1

Power-

Down

XTAL

Power-

Down

REF_Div2

Power-

Down

SPI

Address

SCLK1

Select

SCLK2

Select

MCLK

Mode

f_S

Double

0 = On*

0 = No Div* 00 = 48 kHz* 0 =256*

1 =384

0 = f_S*

0 = 512 × 4.1 kHz* 0 = Output* 11

1 = Power- 1 = Power- 1 = Power- 1 = Div by 2 01 = Not

Down

1 = 2 × f_S1 = 512 × f_S1 = Input

Down

Allowed

10 = 32 kHz

11 = 44.1 kHz

Default Setting.

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

28-Lead Small Outline Package (SSOP)

(RS-28)

0.407 (10.34)

0.397 (10.08)

0.212 (5.38)

0.205 (5.21)

0.311 (7.9)

0.301 (7.64)

PIN 1

0.078 (1.98)

0.068 (1.73)

0.07 (1.79)

0.066 (1.67)

8ꢃ

0ꢃ

0.03 (0.762)

0.022 (0.558)

0.0256 0.015 (0.38)

0.008 (0.203)

0.002 (0.050)

SEATING

PLANE

0.009 (0.229)

0.005 (0.127)

(0.65)

0.010 (0.25)

BSC

–8–

REV. 0

1...5 6 78

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