AD1868
TIMING
AD1868 drops. T his extends the usable battery life. Finally, as
the battery supply voltage drops, the bias voltages and signal
swings also drop, preventing signal clipping and abrupt degra-
dation of distortion. Figure 3 illustrates that T HD+N perfor-
mance of the AD1868 remains constant through a wide range
of supply voltages.
Figure 10 illustrates the specific timing requirements that must
be met in order for the data transfer to be accomplished prop-
erly. T he input pins of the AD1868 are T T L and 5 V CMOS
compatible.
T he maximum clock rate of the AD1868 is specified to be at
least 13.5 MHz. T his clock rate allows data transfer rates of 2×,
4×, 8×, and 16× FS (where FS equals 44.1 kHz). T he applica-
tions section of this data sheet contains additional guidelines for
using the AD1868.
Automotive equipment rely on components which are able to
consistently perform in a wide range of temperatures. In addi-
tion, due to the limited space available in automotive applica-
tions, small size is essential. T he AD1868 is able to satisfy both
of these requirements. T he device has guaranteed specified per-
formance between 0°C and +70°C, and the 16-pin DIP or 16-
pin SOIC package is particularly attractive where overall size is
important.
> 74./ ns
>30ns
>30ns
CLK
>15ns
>40ns
>60ns
>40ns
LATCH
Since the AD1868 provides dc bias voltages, the entire signal
chain can be dc-coupled. T his eliminate ac-coupling capacitors
from the signal path, improving low frequency performance and
lowering system cost and size.
ENABLE (LE)
>30ns
>10ns
INTERNAL DAC INPUT REGISTER
>10ns
UPDATED WITH 18 MOST RECENT BITS
MSB
1st BIT
LSB
2nd BIT
NEXT
WORD
DATA
(18th BIT)
In summary, the AD1868 is an excellent choice for battery op-
erated portable or automotive digital audio systems. In the fol-
lowing sections, some examples of high performance audio
applications featuring the AD1868 are described.
BITS CLOCKED
TO SHIFT REGISTER
Figure 10. Input Signal Tim ing
AD 1868 with Sony CXD 2550P D igital Filter
AP P LICATIO NS O F TH E AD 1868
Figure 11 illustrates an 18-bit CD player design incorporating
an AD1868 DAC, a Sony CXD2550P digital filter and 2-pole
antialias filters. T his high performance, single supply design op-
erates at 8× FS and is suitable for portable and automotive ap-
plications. In this design, the CXD2550P filter transmits left
and right channel digital data to the AD1868. T he left and
right latch signals, LL and LR, are both provided by the word
clock signal (LRCKO) of the digital filter. T he digital data is
converted to low distortion output voltages by the output
amplifiers on the AD1868. Also, no deglitching circuitry or
external adjustments are required. Bypass capacitors, noise
reduction capacitors and the antialias filter details are omitted
for clarity.
T he AD1868 is a high performance audio DAC specifically de-
signed for portable and automotive digital audio applications.
T hese market segments have technical requirements fundamen-
tally different than those found in the high-end or home-use
market segments. Portable equipment must rely on components
which require low amounts of power to offer reasonable playing
times. Also, battery voltages drop as the end of the discharge
cycle is approached. T he AD1868’s ability to operate from a
single +5 V supply makes it a good choice for battery-operated
gear. As the battery voltage drops, the power dissipation of the
+5V POWER
SUPPLY
LEFT
AD1868
CXD2550P
CHANNEL
OUTPUT
1
2
3
4
5
6
7
8
9
16
15
14
13
12
11
TEST
V
L
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
SLOT
LRCK0
DATAL
DATAR
V
L
B
V
O
8Fs/4Fs
1
2
3
4
V
8
RIGHT
LL
DL
CK
DR
LR
S
S
CHANNEL
OUTPUT
V
L
7
6
5
NRL
AGND
NRR
V
V
AGND
DD
SS
BCKO
V
R
10
9
DGND
O
V
R
V
B
S
INIT
Figure 11. AD1868 with Sony CXD2550P Digital Filter
REV. A
–7–