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ADN2806ACPZ

更新时间： 2024-01-05 08:19:38

品牌	Logo	应用领域
亚德诺 - ADI		ATM集成电路 SONET集成电路 SDH集成电路电信集成电路电信电路异步传输模式时钟
页数	文件大小	规格书
20页	395K
描述
622 Mbps Clock and Data Recovery IC

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ADN2806ACPZ 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN, LCC32,.2SQ,20	针数：	32
Reach Compliance Code：	compliant	ECCN代码：	5A991.B.3
HTS代码：	8542.39.00.01	风险等级：	5.79
Is Samacsys：	N	应用程序：	SONET;SDH
JESD-30 代码：	S-XQCC-N32	JESD-609代码：	e3
长度：	5 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	32
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装等效代码：	LCC32,.2SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	260
电源：	3.3 V	认证状态：	Not Qualified
座面最大高度：	1 mm	子类别：	ATM/SONET/SDH ICs
标称供电电压：	3.3 V	表面贴装：	YES
电信集成电路类型：	ATM/SONET/SDH CLOCK RECOVERY CIRCUIT	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	5 mm
Base Number Matches：	1

ADN2806ACPZ 数据手册

622 Mbps Clock and Data Recovery IC

ADN2806

FEATURES

GENERAL DESCRIPTION

Exceeds SONET requirements for jitter transfer/

generation/tolerance

Patented clock recovery architecture

No reference clock required

The ADN2806 provides the receiver functions for clock and

data recovery, and data retiming for 622 Mbps NRZ data. The

ADN2806 automatically locks to 622 Mbps data without the

need for an external reference clock or programming. In the

absence of input data, the output clock drifts no more than

5%. All SONET jitter requirements are met, including jitter

transfer, jitter generation, and jitter tolerance. All specifications

are quoted for −40°C to +85°C ambient temperature, unless

otherwise noted.

Loss-of-lock indicator

I²C® interface to access optional features

Single-supply operation: 3.3 V

Low power: 359 mW typical

5 mm × 5 mm, 32-lead LFCSP, Pb free

This device, together with a PIN diode, TIA preamplifier, and a

lim amp can implement a highly integrated, low cost, low power

fiber optic receiver.

APPLICATIONS

BPON ONT

SONET OC-12

WDM transponders

Regenerators/repeaters

Test equipment

The ADN2806 is available in a compact 5 mm × 5 mm,

32-lead LFCSP.

Broadband cross-connects and routers

FUNCTIONAL BLOCK DIAGRAM

REFCLKP/REFCLKN

(OPTIONAL)

LOL

CF1

CF2 VCC

VEE

LOOP

FILTER

FREQUENCY

DETECT

NIN

PHASE

SHIFTER

PHASE

DETECT

LOOP

FILTER

BUFFER

VCO

VREF

DATA

RE-TIMING

ADN2806

DATAOUTP/

DATAOUTN

CLKOUTP/

CLKOUTN

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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