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A8904SLP PDF预览

A8904SLP

更新时间： 2024-01-05 23:29:56
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器电动机控制电机控制器
页数 文件大小 规格书
18页 835K
描述
3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING

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A8904SLP 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：1.20 MM HEIGHT, LEAD FREE, MO-153AET, TSSOP-28
针数：28Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.82其他特性：ALSO REQUIRES A 4V TO 14V SUPPLY
模拟集成电路 - 其他类型：BRUSHLESS DC MOTOR CONTROLLERJESD-30 代码：R-PDSO-G28
JESD-609代码：e3长度：9.7 mm
湿度敏感等级：2功能数量：1
端子数量：28最高工作温度：85 °C
最低工作温度：-20 °C最大输出电流：1.4 A
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP28,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：5,4/14 V认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Motion Control Electronics
最大供电电流 (Isup)：10 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BCDMOS
温度等级：OTHER端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：4.4 mmBase Number Matches：1

A8904SLP 数据手册

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8904  
3-PHASE BRUSHLESS DC  
MOTOR CONTROLLER/DRIVER  
Terminal Functions  
A8904SLB A8904SLP  
Terminal Name  
LOAD SUPPLY  
CD2  
Function  
(SOIC)  
(HTSSOP)  
VBB; the 5 V or 12 V motor supply.  
1
2
15  
16  
One of two capacitors used to generate the ideal commutation points from  
the back-EMF zero crossing points.  
CWD  
Timing capacitor used by the watchdog circuit to blank out the back-EMF  
comparators during commutation transients, and to detect incorrect motor  
position.  
3
17  
CST  
NC  
Startup oscillator timing capacitor.  
No( internal) connection.  
4
–
18  
19  
20  
21  
–
OUTA  
Power amplifier A output to motor.  
No (internal) connection.  
5
NC  
–
GROUND  
POWER GROUND  
NC  
Power and logic ground and thermal heat sink.  
Power ground.  
6-7  
–
22*  
23  
24  
25  
26  
27  
No (internal) connection.  
–
OUTB  
Power amplifier B output to motor.  
Power amplifier C output to motor.  
Motor centertap connection for back-EMF detection circuitry.  
8
OUTC  
9
CENTERTAP  
10  
11  
Active low turns ON all three sink drivers shorting the motor windings to  
ground. External capacitor and resistor at BRAKE provide brake delay.  
The brake function can also be controlled via the serial port.  
BRAKE  
CRES  
External reservoir capacitor used to hold charge to drive the source drivers’  
gates. Also provides power for brake circuit.  
12  
–
28  
1*  
ANALOG GROUND  
FILTER  
Analog ground.  
Analog voltage input/output to control motor current. Also, compensation node  
for internal speed control loop.  
13  
14  
2
3
SECTOR DATA  
External tachometer input. Can use sector or index pulses from disk to  
provide precise motor speed feedback to internal frequency-locked loop.  
LOGIC SUPPLY  
OSCILLATOR  
DATA OUT  
VDD; the 5 V logic supply.  
15  
16  
17  
4
5
6
Clock input for the speed reference counter.  
Thermal shutdown indicator, FCOM, TACH, or SYNC signals available in  
real time, controlled by 2-bit multiplexer via serial port.  
NC  
No (internal) connection.  
–
18-19  
–
7
GROUND  
Power and logic ground and thermal heat sink.  
Logic ground.  
–
DIGITAL GROUND  
8*  
9
When pulled low forces the chip into sleep mode; clears all serial port bits.  
No (internal) connection.  
20  
–
RESET  
NC  
10  
11  
12  
13  
14  
Strobe input (active low) for data word.  
Clock input for serial port.  
21  
22  
23  
24  
CHIP SELECT  
CLOCK  
DATA IN  
CD1  
Sequential data input for the serial port.  
One of two capacitors used to generate the ideal commutation points from  
the back-EMF zero crossing points.  
* For the A8904SLP, ground terminals 1, 8, and 22 must be connected together externally.  
www.allegromicro.com  
7
1...45678910...18

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