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A8904SLP PDF预览

A8904SLP

更新时间: 2024-02-22 06:47:15
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器电动机控制电机控制器
页数 文件大小 规格书
18页 835K
描述
3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING

A8904SLP 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:1.20 MM HEIGHT, LEAD FREE, MO-153AET, TSSOP-28
针数:28Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.82其他特性:ALSO REQUIRES A 4V TO 14V SUPPLY
模拟集成电路 - 其他类型:BRUSHLESS DC MOTOR CONTROLLERJESD-30 代码:R-PDSO-G28
JESD-609代码:e3长度:9.7 mm
湿度敏感等级:2功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-20 °C最大输出电流:1.4 A
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP28,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5,4/14 V认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Motion Control Electronics
最大供电电流 (Isup):10 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BCDMOS
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

A8904SLP 数据手册

 浏览型号A8904SLP的Datasheet PDF文件第1页浏览型号A8904SLP的Datasheet PDF文件第2页浏览型号A8904SLP的Datasheet PDF文件第3页浏览型号A8904SLP的Datasheet PDF文件第5页浏览型号A8904SLP的Datasheet PDF文件第6页浏览型号A8904SLP的Datasheet PDF文件第7页 
8904  
3-PHASE BRUSHLESS DC  
MOTOR CONTROLLER/DRIVER  
ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5.0 V  
Limits  
Characteristic  
Symbol  
VDD  
Test Conditions  
Min.  
4.5  
Typ.  
Max.  
5.5  
10  
Units  
V
Logic Supply Voltage  
Logic Supply Current  
Operating  
Operating  
Sleep mode  
5.0  
7.5  
250  
3.6  
3.9  
IDD  
mA  
µA  
V
500  
Undervoltage Threshold  
UVLO  
Decreasing VDD  
Increasing VDD  
Operating  
V
Load Supply Voltage  
Load Supply Current  
VBB  
IBB  
4.0  
14  
V
Operating  
4.0  
20  
8.0  
30  
mA  
µA  
°C  
°C  
Sleep mode  
Thermal Shutdown  
TJ  
165  
20  
Thermal Shutdown Hysteresis  
Output Drivers  
TJ  
Output Leakage Current  
IDSX  
VBB = 14 V, VOUT = 14 V, sleep mode  
VBB = 14 V, VOUT = 0 V  
IOUT = 600 mA  
200  
-2.0  
1.0  
300  
-15  
1.4  
µA  
µA  
Total Output ON Resistance  
(source + sink + RS)  
rDS(on)  
Output Sustaining Voltage  
Clamp Diode Forward Voltage  
Control Logic  
VDS(sus)  
VF  
VBB = 14 V, IOUT = IOUT(MAX), L = 3 mH  
IF = 1.0 A  
14  
V
V
1.25  
1.5  
Logic Input Voltage  
VIN(0)  
VIN(1)  
IIN(0)  
SECTOR DATA, RESET, CLK,  
CHIP SELECT, OSC  
VIN = 0 V  
2.0  
0.8  
V
V
Logic Input Current  
-0.5  
±1.0  
2.0  
µA  
µA  
V
IIN(1)  
VIN = 5.0 V  
BRAKE Threshold  
VBRK  
IBRKL  
IBRK  
1.5  
1.75  
4.0  
20  
BRAKE Hysteresis Current  
BRAKE Current  
VBRK = 750 mV  
Brake set, D2 = 1, IBRK = 750 mV  
IOUT = 500 µA  
µA  
µA  
V
DATA Output Voltage  
VOUT(0)  
VOUT(1)  
ICST  
1.5  
IOUT = -500 µA  
Charging  
3.5  
-9.0  
V
CST Current  
-10  
500  
2.5  
1.0  
-10  
10  
-11  
µA  
µA  
V
Discharging, VCST = 2.5 V  
High  
CST Threshold  
Filter Current  
VCSTH  
VCSTL  
IFILTER  
2.25  
0.85  
-9.0  
9.0  
2.75  
1.15  
-11  
11  
Low  
V
Charging  
µA  
µA  
nA  
V
Discharging  
Leakage, VFILTER = 2.5 V  
±5.0  
2.13  
-22  
48  
Filter Threshold  
CD Current  
VFILTERTH  
ICD  
1.57  
-18  
32  
1.85  
-20  
40  
Charging  
µA  
µA  
V
(CD1 or CD2  
)
Discharging  
CD Current Matching  
CD Threshold  
ICD(DISCHRG)/ICD(CHRG)  
1.8  
2.25  
2.0  
2.5  
2.2  
2.75  
1.0  
VCDTH  
ICDIL  
CD Input Leakage  
µA  
Continued next page …  
115 Northeast Cutoff, Box 15036  
4
Worcester, Massachusetts 01615-0036 (508) 853-5000  

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